TROWARGMIN¶
Tile Operation Diagram¶
Introduction¶
Get the column index of the minimum element for each row.
Math Interpretation¶
Let R = src.GetValidRow() and C = src.GetValidCol(). For 0 <= i < R:
\[ \mathrm{dst}_{i,0} = \min_{0 \le j < C} j_{i} \]
Assembly Syntax¶
PTO-AS form: see docs/grammar/PTO-AS.md.
Synchronous form:
%dst = trowargmin %src : !pto.tile<...> -> !pto.tile<...>
Lowering may introduce internal scratch tiles; the C++ intrinsic requires an explicit tmp operand.
IR Level 1 (SSA)¶
%dst = pto.trowargmin %src, %tmp : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>
IR Level 2 (DPS)¶
pto.trowargmin ins(%src, %tmp : !pto.tile_buf<...>, !pto.tile_buf<...>) outs(%dst : !pto.tile_buf<...>)
C++ Intrinsic¶
Declared in include/pto/common/pto_instr.hpp:
template <typename TileDataOut, typename TileDataIn, typename TileDataTmp, typename... WaitEvents>
PTO_INST RecordEvent TROWARGMIN(TileDataOut& dst, TileDataIn& src, TileDataTmp& tmp, WaitEvents&... events);
Constraints¶
Implementation checks (NPU):
- A2A3:
- Tile location:
dstandsrcmust beTileType::Vec. - Tile layout of
src: ND fractal (isRowMajorandSLayout::NoneBox). - Tile layout of
dst:- Compact Mode: DN layout Tile of 1D, e.g.,
Tile<TileType::Vec, T, ROWS, 1, BLayout::ColMajor, ValidRows, 1>, ROWS must be 32b aligned. - Traditional Mode: ND layout Tile of 2D, e.g.,
Tile<TileType::Vec, T, ROWS, COLS, BLayout::RowMajor, ValidRows, 1>.
- Compact Mode: DN layout Tile of 1D, e.g.,
- Source data types:
halforfloat. - Destination data types:
uint32_torint32_t. - Runtime valid checks:
srcValidCol != 0andsrcValidRow != 0.
- A5:
- Source data types:
halforfloat. - Destination data types:
uint32_torint32_t. - No explicit runtime assertions on
validRow/validColin the implementation; the loops usesrc.GetValidRow()andsrc.GetValidCol(). tmptemporary tile is not used, only for compatibility use.
About temporary tile tmp for A3¶
- Temporary tile is not used when
srcValidCol <= ElementPerRepeat, used whensrcValidCol > ElementPerRepeat. tmptile's rows is the same assrc.- Simply set
tmptile size the same assrcwhensrcis small. tmptile's stride can be calculated out based onsrc'svalidColusing the following formula:
repeats = ceil(validCol / elementPerRepeat)
stride = ceil(repeats * 2 / elementPerBlock) * elementPerBlock + ceil(repeats / elementPerBlock) * elementPerBlock
Examples¶
Auto¶
#include <pto/pto-inst.hpp>
using namespace pto;
void example_auto() {
using SrcT = Tile<TileType::Vec, float, 16, 16>;
using DstT = Tile<TileType::Vec, uint32_t, 16, 1, BLayout::ColMajor>;
using TmpT = Tile<TileType::Vec, float, 16, 16>;
SrcT src;
DstT dst;
TmpT tmp;
TROWARGMIN(dst, src, tmp);
}
Manual¶
#include <pto/pto-inst.hpp>
using namespace pto;
void example_manual() {
using SrcT = Tile<TileType::Vec, float, 16, 16>;
using DstT = Tile<TileType::Vec, uint32_t, 16, 1, BLayout::ColMajor>;
using TmpT = Tile<TileType::Vec, float, 16, 16>;
SrcT src;
DstT dst;
TmpT tmp;
TASSIGN(src, 0x1000);
TASSIGN(dst, 0x2000);
TASSIGN(tmp, 0x3000);
TROWARGMIN(dst, src, tmp);
}
ASM Form Examples¶
Auto Mode¶
# Auto mode: compiler/runtime-managed placement and scheduling.
%dst = pto.trowargmin %src, %tmp : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>
Manual Mode¶
# Manual mode: bind resources explicitly before issuing the instruction.
# Optional for tile operands:
# pto.tassign %arg0, @tile(0x1000)
# pto.tassign %arg1, @tile(0x2000)
%dst = pto.trowargmin %src, %tmp : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>
PTO Assembly Form¶
%dst = trowargmin %src : !pto.tile<...> -> !pto.tile<...>
# IR Level 2 (DPS)
pto.trowargmin ins(%src, %tmp : !pto.tile_buf<...>, !pto.tile_buf<...>) outs(%dst : !pto.tile_buf<...>)