ADD

1// PTO-INSTRUCTION: {"assembly":["add SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>, ->{t, u, Rd}"],"block":[],"catalog_indices":[2],"catalog_records":[{"asm":"add SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>, ->{t, u, Rd}","constraints":[],"encoding":[{"index":0,"mask":"0x0000707f","match":"0x00000005","width_bits":32}],"encoding_kind":"L32","fields":[{"name":"RegDst","pieces":[{"instruction_lsb":7,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcL","pieces":[{"instruction_lsb":15,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcR","pieces":[{"instruction_lsb":20,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcRType","pieces":[{"instruction_lsb":25,"value_lsb":0,"width":2}],"signedness":"encoding-defined","width":2},{"name":"shamt","pieces":[{"instruction_lsb":27,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5}],"form_id":"add_32_d04202886d0a","length_bits":32,"mnemonic":"ADD","semantic_family":"ALU","semantic_group":"ALU","semantic_handler":"ScalarBinary","semantic_summary":"ADD applies the selected right-source transformation before its encoded logical left shift, performs fixed-width addition, and publishes the PTO_XLEN result.","status":"accepted"}],"classification":["alu"],"contract":{"block_composition":["none"],"canonical_assembly":["add SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>, ->{t, u, Rd}"],"defaults":["SrcL, SrcR, SrcRType, shamt, and RegDst are required encoded fields; no field can be omitted.","SrcRType=00 selects .sw, SrcRType=01 selects .uw, SrcRType=10 selects .neg, and SrcRType=11 selects no modifier. An omitted assembly suffix encodes SrcRType=11.","Encoded shamt zero performs no shift; every value from 0 through 31 is assigned."],"encoding_class":"standalone-encoded","examples":["add a0, a1, ->a2","add t#1, u#1.neg<<1, ->u","add zero, a0.sw, ->zero"],"exceptions":["ADD raises no arithmetic exception; negation, shifting, and addition wrap modulo 2^PTO_XLEN.","A fixed-bit mismatch or unavailable selected T/U source raises Fault_IllegalInstruction before the destination effect and before TPC advances."],"field_contracts":{},"field_zero_meanings":{"RegDst":"Encoded zero discards the result.","SrcL":"Encoded zero reads the architectural zero GPR.","SrcR":"Encoded zero reads the architectural zero GPR.","SrcRType":"Encoded zero selects .sw and sign-extends SrcR[31:0].","shamt":"Encoded zero performs no shift."},"legality":["SrcL and SrcR codes 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4 without consumption.","RegDst codes 0 and 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write GPRs.","All four SrcRType encodings are assigned. The logical family uses .not while the arithmetic family uses .neg; ADD uses .neg.","Every five-bit shamt value from 0 through 31 is legal."],"memory_effects":["none"],"operands":[{"field":"RegDst","role":"Reg5 destination or discard"},{"field":"SrcL","role":"left Reg5 source"},{"field":"SrcR","role":"right Reg5 source"},{"field":"SrcRType","role":"right-source transformation selector"},{"field":"shamt","role":"post-transformation logical-left-shift amount"}],"ordering":["Snapshot both sources before the destination effect so duplicate sources, destination aliases, and queue publication use pre-instruction values.","Publish the result, then advance TPC by four bytes."],"standalone_opcode":true,"state_effects":["Transform SrcR, perform the logical left shift, and add the shifted value to SrcL modulo 2^PTO_XLEN.","Apply the selected SrcRType transformation before the logical left shift. The transformation and shift affect SrcR only; SrcL is unchanged before the final operation.","Destination codes 0 and 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write GPRs; source queues are non-consuming.","No memory, reservation, descriptor, numeric-flag, trap, block, privilege, or control-flow state changes except the successful TPC advance."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-SCALAR-ADD","mnemonic":"ADD","summary":"ADD applies the selected right-source transformation before its encoded logical left shift, performs fixed-width addition, and publishes the PTO_XLEN result.","surface":"scalar"}2// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}3// NDF-BEGIN: PTO-ADD-DECISION-BINDING-0014// ndf: kind=contract level=L1 layer=scalar status=accepted5// ADD MUST implement the mnemonic-local canonical assembly, encoded6// legality, defaults, state and memory effects, ordering, and fault boundaries7// declared in this owner. The operation region below is the executable binding8// for every accepted decision that names this mnemonic.9// NDF-END: PTO-ADD-DECISION-BINDING-00110// DOC-BEGIN: decode11readonly func InstructionContractOperation_ADD()12    => ScalarOperation13begin14    return ScalarOperation_ADD;15end;16// DOC-END: decode17// DOC-BEGIN: operation18readonly func InstructionContractHandler_ADD()19    => ScalarSemanticHandler20begin21    return ScalarHandler_ScalarBinary;22end;23
24pure func InstructionContractRightModifier_ADD(encoded: bits(2))25    => ScalarRightModifier26begin27    case encoded of28        when '00' => return ScalarRight_SignedWord;29        when '01' => return ScalarRight_UnsignedWord;30        when '10' => return ScalarRight_NegateOrNot;31        when '11' => return ScalarRight_None;32    end;33end;34
35pure func InstructionContractPreparedRight_ADD(36    right: Word,37    encoded_modifier: bits(2),38    shift_amount: integer {0..31})39    => Word40begin41    let modifier = InstructionContractRightModifier_ADD(encoded_modifier);42    let transformed = ApplyScalarRightModifier(right, modifier, FALSE);43    let shifted = LSL(transformed, shift_amount);44    return shifted;45end;46
47pure func InstructionContractResult_ADD(48    left: Word,49    right: Word,50    encoded_modifier: bits(2),51    shift_amount: integer {0..31})52    => Word53begin54    let prepared_right = InstructionContractPreparedRight_ADD(55        right,56        encoded_modifier,57        shift_amount);58    return ScalarBinary(ScalarBinary_ADD, left, prepared_right);59end;60
61pure func InstructionContractIsLogicalFamily_ADD()62    => boolean63begin64    return FALSE;65end;66
67pure func InstructionContractIsWordOperation_ADD()68    => boolean69begin70    return FALSE;71end;72// DOC-END: operation73