CMP.ANDI

assembly

[
  "cmp.andi SrcL, simm, ->{t, u, Rd}"
]

block

[]

catalog_indices

[
  56
]

catalog_records

[
  {
    "asm": "cmp.andi SrcL, simm, ->{t, u, Rd}",
    "constraints": [],
    "encoding": [
      {
        "index": 0,
        "mask": "0x0000707f",
        "match": "0x00002055",
        "width_bits": 32
      }
    ],
    "encoding_kind": "L32",
    "fields": [
      {
        "name": "RegDst",
        "pieces": [
          {
            "instruction_lsb": 7,
            "value_lsb": 0,
            "width": 5
          }
        ],
        "signedness": "encoding-defined",
        "width": 5
      },
      {
        "name": "SrcL",
        "pieces": [
          {
            "instruction_lsb": 15,
            "value_lsb": 0,
            "width": 5
          }
        ],
        "signedness": "encoding-defined",
        "width": 5
      },
      {
        "name": "simm12",
        "pieces": [
          {
            "instruction_lsb": 20,
            "value_lsb": 0,
            "width": 12
          }
        ],
        "signedness": "signed",
        "width": 12
      }
    ],
    "form_id": "cmp_andi_32_da7a5391738d",
    "length_bits": 32,
    "mnemonic": "CMP.ANDI",
    "semantic_family": "BRU",
    "semantic_group": "BRU",
    "semantic_handler": "ExecuteCompareLogical",
    "semantic_summary": "CMP.ANDI - Combine scalar comparison results with the encoded logical operation.",
    "status": "accepted"
  }
]

classification

[
  "bru"
]

contract

{
  "block_composition": [
    "none"
  ],
  "canonical_assembly": [
    "cmp.andi SrcL, simm, ->{t, u, Rd}"
  ],
  "defaults": [
    "The selected assembly form determines which fields are present; every present field carries its encoded value and no encoded zero means omission."
  ],
  "encoding_class": "standalone-encoded",
  "examples": [
    "cmp.andi SrcL, simm, ->{t, u, Rd}"
  ],
  "exceptions": [
    "Reserved field encodings raise Fault_IllegalInstruction before effects; handler-specific arithmetic, memory, control-flow, system-register, and privilege faults follow the embedded normative ASL operation."
  ],
  "field_contracts": {},
  "field_zero_meanings": {
    "RegDst": "Encoded zero names the architectural zero GPR.",
    "SrcL": "Encoded zero names the architectural zero GPR.",
    "simm12": "Encoded zero supplies numeric zero for the 12-bit signed immediate or displacement."
  },
  "legality": [
    "Every value in each unconstrained encoded field is assigned; constrained complements are reserved and reject before effects."
  ],
  "memory_effects": [
    "none"
  ],
  "operands": [
    {
      "field": "RegDst",
      "role": "absolute GPR destination"
    },
    {
      "field": "SrcL",
      "role": "left absolute GPR source"
    },
    {
      "field": "simm12",
      "role": "12-bit signed immediate or displacement"
    }
  ],
  "ordering": [
    "none"
  ],
  "standalone_opcode": true,
  "state_effects": [
    "CMP.ANDI - Combine scalar comparison results with the encoded logical operation.",
    "After decode and legality checks, execute the normative ExecuteCompareLogical ASL handler; no other architectural state is modified."
  ]
}

depends_on

[
  "PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"
]

id

PTO-SCALAR-CMP-ANDI

mnemonic

CMP.ANDI

summary

CMP.ANDI - Combine scalar comparison results with the encoded logical operation.

surface

scalar

{
  "classification": [
    "bru"
  ],
  "documentation": "docs/scalar/bru/CMP.ANDI.md",
  "id": "PTO-SCALAR-CMP-ANDI",
  "instruction_contract": {
    "artifact": "spec/evidence/instruction-contract-closure.json",
    "mnemonic": "CMP.ANDI",
    "ndf_clause": "PTO-INST-SCALAR-CMP-ANDI"
  },
  "mnemonic": "CMP.ANDI",
  "readiness_subjects": [
    "ADR-0027",
    "ADR-0059"
  ],
  "semantic_tests": [
    "PTO-AVS-BRU-CMP-ANDI-BOUND-001",
    "PTO-AVS-BRU-CMP-ANDI-EXEC-001"
  ],
  "source": "asl/scalar/bru/CMP.ANDI.asl",
  "surface": "scalar",
  "tests": [
    "PTO-AVS-BRU-CMP-ANDI-BOUND-001",
    "PTO-AVS-BRU-CMP-ANDI-EXEC-001",
    "PTO-AVS-SCALAR-CMP-ANDI-DECODE-001"
  ]
}