Operands and parameters
RegSrc- absolute GPR source 0 through 23
uimm17- unsigned addend before low-16-bit truncation
Writes one selected bundle-local LB register from an absolute GPR plus immediate, truncated to 16 bits.
PTO-BLOCK-B-DIMB.DIM RegSrc, uimm17, ->LB0B.DIM RegSrc, uimm17, ->LB1B.DIM RegSrc, uimm17, ->LB2| Field | Bits | Signedness | Architectural role | Encoded zero |
|---|---|---|---|---|
RegSrc | 5 | encoding-defined | absolute GPR source 0 through 23 | Encoded zero names the architectural zero GPR. |
uimm17 | 17 | unsigned | unsigned addend before low-16-bit truncation | Encoded zero supplies a zero displacement or zero immediate value. |
Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.
| Decoded item | Bit range | Value |
|---|---|---|
| uimm17 | 31:20 | variable |
| RegSrc | 19:15 | variable |
| Constant | 14:12 | 3'b010 |
| uimm17 | 11:7 | variable |
| Constant | 6:0 | 7'b1000011 |
{
"reg": [
{
"bits": 7,
"name": "7'b1000011"
},
{
"bits": 5,
"name": "uimm17"
},
{
"bits": 3,
"name": "3'b010"
},
{
"bits": 5,
"name": "RegSrc"
},
{
"bits": 12,
"name": "uimm17"
}
],
"config": {
"bits": 32,
"fontsize": 13,
"hspace": 900,
"lanes": 1,
"offset": 0
}
}B.DIM RegSrc, uimm, ->LB2
Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.
| Decoded item | Bit range | Value |
|---|---|---|
| uimm17 | 31:20 | variable |
| RegSrc | 19:15 | variable |
| Constant | 14:12 | 3'b000 |
| uimm17 | 11:7 | variable |
| Constant | 6:0 | 7'b1000011 |
{
"reg": [
{
"bits": 7,
"name": "7'b1000011"
},
{
"bits": 5,
"name": "uimm17"
},
{
"bits": 3,
"name": "3'b000"
},
{
"bits": 5,
"name": "RegSrc"
},
{
"bits": 12,
"name": "uimm17"
}
],
"config": {
"bits": 32,
"fontsize": 13,
"hspace": 900,
"lanes": 1,
"offset": 0
}
}B.DIM RegSrc, uimm, ->LB0
Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.
| Decoded item | Bit range | Value |
|---|---|---|
| uimm17 | 31:20 | variable |
| RegSrc | 19:15 | variable |
| Constant | 14:12 | 3'b001 |
| uimm17 | 11:7 | variable |
| Constant | 6:0 | 7'b1000011 |
{
"reg": [
{
"bits": 7,
"name": "7'b1000011"
},
{
"bits": 5,
"name": "uimm17"
},
{
"bits": 3,
"name": "3'b001"
},
{
"bits": 5,
"name": "RegSrc"
},
{
"bits": 12,
"name": "uimm17"
}
],
"config": {
"bits": 32,
"fontsize": 13,
"hspace": 900,
"lanes": 1,
"offset": 0
}
}B.DIM RegSrc, uimm, ->LB1
RegSrcuimm17Decode and Operation come directly from the instruction owner and remain separated by execution phase.
readonly func InstructionContractMatches_B_DIM(operation: CommandOperation) => booleanbegin return (operation == CommandOperation_b_dim_32_1caa1aa2944a) || (operation == CommandOperation_b_dim_32_27602ab68929) || (operation == CommandOperation_b_dim_32_4191099a5f4d);end;type BundleDimensionRegister of enumeration { BundleDimension_LB0, BundleDimension_LB1, BundleDimension_LB2};
pure func BundleDimensionIndexOfRegister(reg: BundleDimensionRegister) => BundleDimensionIndexbegin case reg of when BundleDimension_LB0 => return 0; when BundleDimension_LB1 => return 1; when BundleDimension_LB2 => return 2; end;end;
readonly func InstructionContractHandler_B_DIM() => CommandSemanticHandlerbegin return CommandHandler_SetBundleDimension;end;
pure func InstructionContractHeaderOnly_B_DIM() => booleanbegin return TRUE;end;
pure func InstructionContractDuplicateRejects_B_DIM() => booleanbegin return TRUE;end;// PTO-INSTRUCTION: {"assembly":["B.DIM RegSrc, uimm, ->LB2","B.DIM RegSrc, uimm, ->LB0","B.DIM RegSrc, uimm, ->LB1"],"block":[],"catalog_indices":[2,3,4],"catalog_records":[{"asm":"B.DIM RegSrc, uimm, ->LB2","constraints":[{"field":"RegSrc","operator":"one-of","values":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23]}],"encoding":[{"index":0,"mask":"0x0000707f","match":"0x00002043","width_bits":32}],"encoding_kind":"L32","fields":[{"name":"RegSrc","pieces":[{"instruction_lsb":15,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"uimm17","pieces":[{"instruction_lsb":20,"value_lsb":0,"width":12},{"instruction_lsb":7,"value_lsb":12,"width":5}],"signedness":"unsigned","width":17}],"form_id":"b_dim_32_1caa1aa2944a","length_bits":32,"mnemonic":"B.DIM","semantic_family":"CMD","semantic_group":"Bundle Argument","semantic_handler":"SetBundleDimension","semantic_summary":"Writes zero-extend((GPR[RegSrc] + uimm17)[15:0]) to the selected bundle-local LB register exactly once.","status":"accepted"},{"asm":"B.DIM RegSrc, uimm, ->LB0","constraints":[{"field":"RegSrc","operator":"one-of","values":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23]}],"encoding":[{"index":0,"mask":"0x0000707f","match":"0x00000043","width_bits":32}],"encoding_kind":"L32","fields":[{"name":"RegSrc","pieces":[{"instruction_lsb":15,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"uimm17","pieces":[{"instruction_lsb":20,"value_lsb":0,"width":12},{"instruction_lsb":7,"value_lsb":12,"width":5}],"signedness":"unsigned","width":17}],"form_id":"b_dim_32_27602ab68929","length_bits":32,"mnemonic":"B.DIM","semantic_family":"CMD","semantic_group":"Bundle Argument","semantic_handler":"SetBundleDimension","semantic_summary":"Writes zero-extend((GPR[RegSrc] + uimm17)[15:0]) to the selected bundle-local LB register exactly once.","status":"accepted"},{"asm":"B.DIM RegSrc, uimm, ->LB1","constraints":[{"field":"RegSrc","operator":"one-of","values":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23]}],"encoding":[{"index":0,"mask":"0x0000707f","match":"0x00001043","width_bits":32}],"encoding_kind":"L32","fields":[{"name":"RegSrc","pieces":[{"instruction_lsb":15,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"uimm17","pieces":[{"instruction_lsb":20,"value_lsb":0,"width":12},{"instruction_lsb":7,"value_lsb":12,"width":5}],"signedness":"unsigned","width":17}],"form_id":"b_dim_32_4191099a5f4d","length_bits":32,"mnemonic":"B.DIM","semantic_family":"CMD","semantic_group":"Bundle Argument","semantic_handler":"SetBundleDimension","semantic_summary":"Writes zero-extend((GPR[RegSrc] + uimm17)[15:0]) to the selected bundle-local LB register exactly once.","status":"accepted"}],"classification":["attributes"],"contract":{"block_composition":["Header command after BSTART and before the first body instruction. B.DIM and compressed dimension forms share one write-once presence bit for each of LB0, LB1, and LB2."],"canonical_assembly":["B.DIM RegSrc, uimm17, ->LB0","B.DIM RegSrc, uimm17, ->LB1","B.DIM RegSrc, uimm17, ->LB2"],"defaults":["The selected form fixes LB0, LB1, or LB2; RegSrc and uimm17 are both encoded and zero remains an explicit value."],"encoding_class":"standalone-encoded","examples":["B.DIM a0, 16, ->LB0","B.DIM zero, 0, ->LB2"],"exceptions":["RegSrc codes 24 through 31 raise Fault_IllegalInstruction before reading a queue or changing bundle state.","A write outside an active block header or a second write to the same LB raises Fault_BundleControl before changing the first value."],"field_contracts":{},"field_zero_meanings":{"RegSrc":"Encoded zero names the architectural zero GPR.","uimm17":"Encoded zero supplies a zero displacement or zero immediate value."},"legality":["b_dim_32_1caa1aa2944a.RegSrc accepts only absolute GPR codes 0..23; 24..31 are reserved.","b_dim_32_27602ab68929.RegSrc accepts only absolute GPR codes 0..23; 24..31 are reserved.","b_dim_32_4191099a5f4d.RegSrc accepts only absolute GPR codes 0..23; 24..31 are reserved."],"memory_effects":["none"],"operands":[{"field":"RegSrc","role":"absolute GPR source 0 through 23"},{"field":"uimm17","role":"unsigned addend before low-16-bit truncation"}],"ordering":["none"],"standalone_opcode":true,"state_effects":["Computes zero-extend((GPR[RegSrc] + zero-extend(uimm17))[15:0]) and writes the selected LB0, LB1, or LB2 register.","LB meanings are selected by the completed operation schema; B.DIM itself assigns no universal row, column, M, N, or K role.","Each LB may be written at most once per block across B.DIM and compressed dimension forms."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-BLOCK-B-DIM","mnemonic":"B.DIM","summary":"Writes one selected bundle-local LB register from an absolute GPR plus immediate, truncated to 16 bits.","surface":"block"}// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}// NDF-BEGIN: PTO-B-DIM-WRITE-001// ndf: kind=contract level=L1 layer=block status=accepted// B.DIM MUST read only absolute GPR codes 0..23, MUST write the low sixteen// bits of GPR plus unsigned uimm17, and MUST write each selected LB at most// once across all full and compressed dimension forms in one block.// NDF-END: PTO-B-DIM-WRITE-001// DOC-BEGIN: decodereadonly func InstructionContractMatches_B_DIM(operation: CommandOperation) => booleanbegin return (operation == CommandOperation_b_dim_32_1caa1aa2944a) || (operation == CommandOperation_b_dim_32_27602ab68929) || (operation == CommandOperation_b_dim_32_4191099a5f4d);end;// DOC-END: decode// DOC-BEGIN: operationtype BundleDimensionRegister of enumeration { BundleDimension_LB0, BundleDimension_LB1, BundleDimension_LB2};
pure func BundleDimensionIndexOfRegister(reg: BundleDimensionRegister) => BundleDimensionIndexbegin case reg of when BundleDimension_LB0 => return 0; when BundleDimension_LB1 => return 1; when BundleDimension_LB2 => return 2; end;end;
readonly func InstructionContractHandler_B_DIM() => CommandSemanticHandlerbegin return CommandHandler_SetBundleDimension;end;
pure func InstructionContractHeaderOnly_B_DIM() => booleanbegin return TRUE;end;
pure func InstructionContractDuplicateRejects_B_DIM() => booleanbegin return TRUE;end;// DOC-END: operation
B.DIM is a 32-bit block header command that writes one block-local dimension register during header construction. It changes pending block metadata rather than executing a tile body operation immediately.
The command belongs to an active header before the first body instruction. Its effective order and arity are checked against the completed operation schema rather than inferred from this command in isolation.
The command adds the unsigned immediate to the selected absolute GPR, keeps the low 16 bits, zero-extends that value, and writes the selected LB0, LB1, or LB2 slot once.
RegSrc identifies an input source or source-role selector; its exact assigned domain remains in the generated contract below.uimm17 supplies the encoded offset or addend; its exact assigned domain remains in the generated contract below.An accepted header command changes only its pending record or carrier. Architectural tile, Shared, GPR, memory, and completion effects remain deferred to the completed block unless this owner's contract explicitly identifies an immediate header-state update.
Reserved encodings are rejected before reads or pending-state changes. Placement, duplicate, role, or completed-schema mismatches fail before body effects.
This worked example is illustrative; it illustrates the current owner without replacing it.
B.DIM RegSrc, uimm, ->LB2Assume an active compatible header with no earlier conflicting B.DIM command. Placing B.DIM RegSrc, uimm, ->LB2 at the next header slot records this command's pending fields; it does not by itself execute the eventual body operation.
Bodies come from owning ASL. Dragging or buttons change only this page-session view order.
B.DIM MUST read only absolute GPR codes 0..23, MUST write the low sixteen bits of GPR plus unsigned uimm17, and MUST write each selected LB at most once across all full and compressed dimension forms in one block.
PTO-B-DIM-WRITE-001asl/block/attributes/B.DIM.aslbe7b6d35546379394673d5c6ab3acbf4b357f7d26c12e8e0e68a448674c85800204b433a73d6ccb3833b0fa05d7fd077ed53df7bbab76b6ce870748dee73727815 matching entries
PTO-AVS-BLOCK-B-DIM-DECODE-001tests/asl/block/attributes/B.DIM/block-decode-b-dim-canonical-001.aslac10b1de4aa54f5b37851d0c11fceb50bccea736477e5f9fb38246fbef8d81a5PTO-AVS-BLOCK-B-DIM-DUPLICATE-001tests/asl/block/attributes/B.DIM/block-fault-b-dim-duplicate-001.asl162fa5b1502d7a0bad903f4e7e16c77a506a16d6c0a6b991ce7684d90644e36dPTO-AVS-BLOCK-B-DIM-GPR-BOUNDARY-001tests/asl/block/attributes/B.DIM/block-bound-b-dim-gpr-001.asl0050301c2823c2a9c533dba50fc989857f08b2a506e4214f9eca856d1545b4e8PTO-AVS-BLOCK-B-DIM-LOW16-001tests/asl/block/attributes/B.DIM/block-bound-b-dim-low-16-001.asla01b03b0d012fd0a7c4cee205b40660022d498c0ac2ac5b8ccc2800abcab790dPTO-AVS-BLOCK-B-DIM-PLACEMENT-001tests/asl/block/attributes/B.DIM/block-fault-b-dim-placement-001.asl47118ea1df163ed60cf193866e5022ccc932f4546f2ab351d5698629054f339cPTO-EVIDENCE-RELEASE-TRACEABILITYPTO-EVIDENCE-RELEASE-TRACEABILITYspec/evidence/release-traceability-readiness.jsonc7327021d39dc67ac5564bc55073b3870a397d79ac8d9648284d56e33bc14a3ePTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREPTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREspec/evidence/instruction-contract-closure.json3ef2bb62421c79dff8fa77a1c7983923b523244b8090812883ef81286ca8106aPTO-EVIDENCE-ARCHITECTURE-READINESSPTO-EVIDENCE-ARCHITECTURE-READINESSspec/evidence/architecture-readiness.json4b0b85199101251bea744e0f3591cc31906909dc80d5ab651c417a936036a004PTO-EVIDENCE-RELEASE-GATE-READINESSPTO-EVIDENCE-RELEASE-GATE-READINESSspec/evidence/release-gate-readiness.jsona0f4d2b6920c08981ea55fd8ef820708a40d4feb5402c5150e8e9ab532d84ce0PTO-EVIDENCE-RELEASE-MANIFESTPTO-EVIDENCE-RELEASE-MANIFESTspec/release-manifest.json1a64c109ed7a90351c41e2a418b3c0ebaf8ad975838986d2101385186b85c0d8Loading ADR-0022…
ADR-0022docs/status/decisions/0022-bundle-operation-descriptor-and-commit.mdf129ec54af4630d28bf6c94e5829a3cafe904706fdd9f59ca65ee62cb511ad47Loading ADR-0032…
ADR-0032docs/status/decisions/0032-bundle-command-totality-and-profile-boundaries.mde1f91826817343c0977a565a91e495a15397b83fa2af227124f225821ffa54aeLoading ADR-0052…
ADR-0052docs/status/decisions/0052-direct-tile-and-bundle-catalog-closure.md5fdb38bf480e37affe5075f93b35a57d32803018c986bfe05160f188a19ccaf6Loading ADR-0059…
ADR-0059docs/status/decisions/0059-mnemonic-field-encoding-closure.mdf18d13f735cfaf9f2803c754c5818f4af33d1cc42c489f0d9ce060b07bb3a196Loading ADR-0075…
ADR-0075docs/status/decisions/0075-block-attributes-and-lifecycle.md9a995639ec5db9316011dd4546df798cf5a0895173f5c68cf6fc06602788e27b{
"classification": [
"attributes"
],
"documentation": "docs/block/attributes/B.DIM.md",
"id": "PTO-BLOCK-B-DIM",
"instruction_contract": {
"artifact": "spec/evidence/instruction-contract-closure.json",
"mnemonic": "B.DIM",
"ndf_clause": "PTO-INST-BLOCK-B-DIM"
},
"mnemonic": "B.DIM",
"readiness_subjects": [
"ADR-0022",
"ADR-0032",
"ADR-0052",
"ADR-0059",
"ADR-0075"
],
"semantic_tests": [
"PTO-AVS-BLOCK-B-DIM-DUPLICATE-001",
"PTO-AVS-BLOCK-B-DIM-GPR-BOUNDARY-001",
"PTO-AVS-BLOCK-B-DIM-LOW16-001",
"PTO-AVS-BLOCK-B-DIM-PLACEMENT-001"
],
"source": "asl/block/attributes/B.DIM.asl",
"surface": "block",
"tests": [
"PTO-AVS-BLOCK-B-DIM-DECODE-001",
"PTO-AVS-BLOCK-B-DIM-DUPLICATE-001",
"PTO-AVS-BLOCK-B-DIM-GPR-BOUNDARY-001",
"PTO-AVS-BLOCK-B-DIM-LOW16-001",
"PTO-AVS-BLOCK-B-DIM-PLACEMENT-001"
]
}0.58.5 · Release candidate7dc8b7e5b121d2b2499a2273bebff29e2cd86812be7b6d35546379394673d5c6ab3acbf4b357f7d26c12e8e0e68a448674c8580068d63621e6f637ab6a7f9e043391f717c33cf28862bc52588ba7b4f47a3b28f6asl/block/attributes/B.DIM.aslasl/block/attributes/B.DIM.aslasl/block/attributes/B.DIM.asl