Operands and parameters
SrcL- Reg5 address-base source
SrcR- Reg5 register-offset source
SrcRType- register-offset transformation selector
model- cache-level hint selector
shamt- post-transformation logical-left-shift amount
HL.PRF snapshots its scalar sources, forms its encoded address, and issues a non-binding 1-byte-granularity prefetch hint with no destination effect.
PTO-SCALAR-HL-PRFhl.prf{.l1,.l2,.l3} [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>]| Field | Bits | Signedness | Architectural role | Encoded zero |
|---|---|---|---|---|
SrcL | 5 | encoding-defined | Reg5 address-base source | Encoded zero reads the architectural zero GPR. |
SrcR | 5 | encoding-defined | Reg5 register-offset source | Encoded zero reads the architectural zero GPR. |
SrcRType | 2 | encoding-defined | register-offset transformation selector | Encoded zero leaves the complete PTO_XLEN register-offset value unchanged. |
model | 5 | encoding-defined | cache-level hint selector | Encoded zero selects the non-binding L1 cache hint. |
shamt | 5 | encoding-defined | post-transformation logical-left-shift amount | Encoded zero performs no shift. |
Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.
| Decoded item | Bit range | Value |
|---|---|---|
| shamt | 47:43 | variable |
| SrcRType | 42:41 | variable |
| SrcR | 40:36 | variable |
| SrcL | 35:31 | variable |
| Constant | 30:16 | 15'b111000000001001 |
| model | 15:11 | variable |
| Constant | 10:0 | 11'b00000001110 |
{
"reg": [
{
"bits": 11,
"name": "11'b00000001110"
},
{
"bits": 5,
"name": "model"
},
{
"bits": 15,
"name": "15'b111000000001001"
},
{
"bits": 5,
"name": "SrcL"
},
{
"bits": 5,
"name": "SrcR"
},
{
"bits": 2,
"name": "SrcRType"
},
{
"bits": 5,
"name": "shamt"
}
],
"config": {
"bits": 48,
"fontsize": 13,
"hspace": 900,
"lanes": 2,
"offset": 0
}
}hl.prf{.l1,.l2,.l3} [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>]
SrcLSrcRSrcRTypemodelshamtThis Operation comes directly from the instruction owner; the page does not rewrite its behavior.
readonly func InstructionContractOperation_HL_PRF() => ScalarOperationbegin return ScalarOperation_HL_PRF;end;readonly func InstructionContractHandler_HL_PRF() => ScalarSemanticHandlerbegin return ScalarHandler_ScalarPrefetch;end;
pure func InstructionContractAGUAction_HL_PRF() => ScalarAGUActionbegin return ScalarAGU_Prefetch;end;
pure func InstructionContractAGUAddressKind_HL_PRF() => ScalarAGUAddressKindbegin return ScalarAGU_Register;end;
pure func InstructionContractAGUSizeBytes_HL_PRF() => integer {1,2,4,8}begin return 1;end;
pure func InstructionContractAGUOffsetScale_HL_PRF() => integer {0..3}begin return 0;end;
pure func InstructionContractAGUUpdateMode_HL_PRF() => AddressUpdateModebegin return AddressUpdate_None;end;
pure func InstructionContractAGUSignedLoad_HL_PRF() => booleanbegin return FALSE;end;
pure func InstructionContractAGUPrefetchReturnsAddress_HL_PRF() => booleanbegin return FALSE;end;// PTO-INSTRUCTION: {"assembly":["hl.prf{.l1,.l2,.l3} [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>]"],"block":[],"catalog_indices":[228],"catalog_records":[{"agu":{"action":"Prefetch","address_kind":"Register","offset_scale":0,"prefetch_returns_address":false,"signed_load":false,"size_bytes":1,"update_mode":"None"},"asm":"hl.prf{.l1,.l2,.l3} [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>]","constraints":[{"field":"model","operator":"one-of","values":[0,1,2]}],"encoding":[{"index":0,"mask":"0x00007fff07ff","match":"0x00007009000e","width_bits":48}],"encoding_kind":"HL48","fields":[{"name":"SrcL","pieces":[{"instruction_lsb":31,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcR","pieces":[{"instruction_lsb":36,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcRType","pieces":[{"instruction_lsb":41,"value_lsb":0,"width":2}],"signedness":"encoding-defined","width":2},{"name":"model","pieces":[{"instruction_lsb":11,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"shamt","pieces":[{"instruction_lsb":43,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5}],"form_id":"hl_prf_48_39641863bb21","length_bits":48,"mnemonic":"HL.PRF","semantic_family":"AGU","semantic_group":"LDA","semantic_handler":"ScalarPrefetch","semantic_summary":"HL.PRF snapshots its scalar sources, forms its encoded address, and issues a non-binding 1-byte-granularity prefetch hint with no destination effect.","status":"accepted"}],"classification":["agu"],"contract":{"block_composition":["none"],"canonical_assembly":["hl.prf{.l1,.l2,.l3} [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>]"],"defaults":["Every displayed operand field is encoded explicitly; encoded zero is a value and never denotes omission.","SrcRType=0 leaves SrcR unchanged, SrcRType=1 sign-extends SrcR[31:0], SrcRType=2 zero-extends SrcR[31:0], and SrcRType=3 negates the full PTO_XLEN value. Encoded shamt zero performs no shift.","model=0 selects L1, model=1 selects L2, and model=2 selects L3; the cache target is a non-binding performance hint."],"encoding_class":"standalone-encoded","examples":["hl.prf{.l1,.l2,.l3} [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>]"],"exceptions":["A fixed-bit mismatch, reserved field value, or unavailable selected T/U source raises Fault_IllegalInstruction before instruction effects.","A legal prefetch model cannot raise a data-access fault. A reserved model rejects before source reads and before optional address publication."],"field_contracts":{},"field_zero_meanings":{"SrcL":"Encoded zero reads the architectural zero GPR.","SrcR":"Encoded zero reads the architectural zero GPR.","SrcRType":"Encoded zero leaves the complete PTO_XLEN register-offset value unchanged.","model":"Encoded zero selects the non-binding L1 cache hint.","shamt":"Encoded zero performs no shift."},"legality":["Every encoded Reg5 source uses the complete domain: codes 0..23 select absolute GPRs, codes 24..27 select T#1..T#4, and codes 28..31 select U#1..U#4 without consumption.","All four SrcRType values and all shamt values 0..31 are assigned; apply the modifier before the shift.","model codes 0, 1, and 2 are assigned; codes 3..31 are reserved and raise Fault_IllegalInstruction before any scalar source read or architectural effect."],"memory_effects":["The 1-byte-granularity hint performs no architectural translation, permission or alignment check, memory access, memory event, reservation update, ordering edge, or cache-placement guarantee."],"operands":[{"field":"SrcL","role":"Reg5 address-base source"},{"field":"SrcR","role":"Reg5 register-offset source"},{"field":"SrcRType","role":"register-offset transformation selector"},{"field":"model","role":"cache-level hint selector"},{"field":"shamt","role":"post-transformation logical-left-shift amount"}],"ordering":["Snapshot all explicit and implicit scalar sources before destination or memory effects; duplicate and source/destination aliases observe pre-instruction values.","For a legal model, form the hint, publish the optional address result, and then advance TPC by 6 bytes."],"standalone_opcode":true,"state_effects":["Form offset = LSL(Modify(SrcR, SrcRType), the encoded shamt) and add it modulo 2^PTO_XLEN to the SrcL base.","Discard the formed address after issuing the non-binding hint; no encoded field publishes a result.","Successful execution advances TPC by 6 bytes; a rejected or faulting attempt does not retire."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-SCALAR-HL-PRF","mnemonic":"HL.PRF","summary":"HL.PRF snapshots its scalar sources, forms its encoded address, and issues a non-binding 1-byte-granularity prefetch hint with no destination effect.","surface":"scalar"}// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}// NDF-BEGIN: PTO-HL-PRF-CACHE-MODEL-001// ndf: kind=contract level=L1 layer=scalar status=accepted// HL.PRF MUST assign model 0 to L1, 1 to L2, and 2 to L3.// Model values 3 through 31 MUST reject before scalar source reads or effects.// Legal hints MUST form the encoded address without translation, memory event,// ordering edge, data-access fault, or architecturally guaranteed placement.// The effective address MUST be discarded with no destination effect.// NDF-END: PTO-HL-PRF-CACHE-MODEL-001// DOC-BEGIN: decodereadonly func InstructionContractOperation_HL_PRF() => ScalarOperationbegin return ScalarOperation_HL_PRF;end;// DOC-END: decode// DOC-BEGIN: operationreadonly func InstructionContractHandler_HL_PRF() => ScalarSemanticHandlerbegin return ScalarHandler_ScalarPrefetch;end;
pure func InstructionContractAGUAction_HL_PRF() => ScalarAGUActionbegin return ScalarAGU_Prefetch;end;
pure func InstructionContractAGUAddressKind_HL_PRF() => ScalarAGUAddressKindbegin return ScalarAGU_Register;end;
pure func InstructionContractAGUSizeBytes_HL_PRF() => integer {1,2,4,8}begin return 1;end;
pure func InstructionContractAGUOffsetScale_HL_PRF() => integer {0..3}begin return 0;end;
pure func InstructionContractAGUUpdateMode_HL_PRF() => AddressUpdateModebegin return AddressUpdate_None;end;
pure func InstructionContractAGUSignedLoad_HL_PRF() => booleanbegin return FALSE;end;
pure func InstructionContractAGUPrefetchReturnsAddress_HL_PRF() => booleanbegin return FALSE;end;// DOC-END: operation
HL.PRF is a standalone 48-bit scalar AGU instruction that forms a non-binding prefetch hint without performing an architectural memory access using Register addressing.
The register-offset path applies the encoded SrcRType transformation to SrcR, shifts that result left by shamt, and adds it to the snapshotted SrcL value modulo 2^PTO_XLEN.
A legal model selects the hint level. The hint performs no translation, permission check, alignment check, memory access, memory event, reservation update, ordering edge, or cache-placement guarantee.
The formed address is discarded after the hint; no result field publishes it.
SrcL is a 5-bit field selecting the address base.SrcR is a 5-bit field selecting the register offset.SrcRType is a 2-bit field selecting the register-offset transformation.model is a 5-bit field selecting the prefetch hint level.shamt is a 5-bit field selecting the post-transformation left shift.All explicit and implicit scalar sources are snapshotted before any memory or destination effect, so aliases use pre-instruction values.
A legal hint records no architectural memory event and does not change reservation state.
After all result or writeback publication, HL.PRF advances TPC by 6 bytes; a rejected or faulting attempt does not retire.
model values 0, 1, and 2 are assigned; values 3..31 are reserved and cause Fault_IllegalInstruction before source reads or address publication.
A legal prefetch hint cannot raise a data-access fault because it performs no architectural access. Fixed-bit mismatches or unavailable selected T/U sources are rejected before effects.
This walkthrough explains how to use the page and does not add instruction behavior.
hl.prf{.l1,.l2,.l3} [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>] and identify the encoded address fields.Bodies come from owning ASL. Dragging or buttons change only this page-session view order.
HL.PRF MUST assign model 0 to L1, 1 to L2, and 2 to L3. Model values 3 through 31 MUST reject before scalar source reads or effects. Legal hints MUST form the encoded address without translation, memory event, ordering edge, data-access fault, or architecturally guaranteed placement. The effective address MUST be discarded with no destination effect.
PTO-HL-PRF-CACHE-MODEL-001asl/scalar/agu/HL.PRF.asl06db582d76830c7d21dbf59da307db7c3e32539a8d78adcac0008a839b4074df4713f265328375d6c4ee8064c29bff34fbefd4880aebcfa2497c5206699add6113 matching entries
PTO-AVS-AGU-HL-PRF-ALIAS-001tests/asl/scalar/agu/HL.PRF/scalar-exec-hl-prf-registers-001.asl2dafc168409abf5fa93096707270268d7faa471500817ad22e5dd924d742bcf8PTO-AVS-AGU-HL-PRF-BOUND-001tests/asl/scalar/agu/HL.PRF/scalar-bound-hl-prf-address-001.aslc1517b441b897dbbed5c66063d12649a011878a969133451b464f909435116e7PTO-AVS-AGU-HL-PRF-EXEC-001tests/asl/scalar/agu/HL.PRF/scalar-exec-hl-prf-direct-001.asl50df5bd9bc3968e3e33baea9394de260f87f61fe20225d9ed3012fad8e49937bPTO-AVS-AGU-HL-PRF-FAULT-001tests/asl/scalar/agu/HL.PRF/scalar-fault-hl-prf-precise-001.asld16de2ffd7fe8cb91859fa99525a0a253e7e1884d61a6dae0f01765cc6d67ce8PTO-AVS-SCALAR-HL-PRF-DECODE-001tests/asl/scalar/agu/HL.PRF/scalar-decode-hl-prf-canonical-001.asl499f3b4412939f073e31f9c70d0a1a591461e06359d1d6896f17f8bc533dfa86PTO-EVIDENCE-RELEASE-TRACEABILITYPTO-EVIDENCE-RELEASE-TRACEABILITYspec/evidence/release-traceability-readiness.jsonc7327021d39dc67ac5564bc55073b3870a397d79ac8d9648284d56e33bc14a3ePTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREPTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREspec/evidence/instruction-contract-closure.json3ef2bb62421c79dff8fa77a1c7983923b523244b8090812883ef81286ca8106aPTO-EVIDENCE-ARCHITECTURE-READINESSPTO-EVIDENCE-ARCHITECTURE-READINESSspec/evidence/architecture-readiness.json4b0b85199101251bea744e0f3591cc31906909dc80d5ab651c417a936036a004PTO-EVIDENCE-RELEASE-GATE-READINESSPTO-EVIDENCE-RELEASE-GATE-READINESSspec/evidence/release-gate-readiness.jsona0f4d2b6920c08981ea55fd8ef820708a40d4feb5402c5150e8e9ab532d84ce0PTO-EVIDENCE-RELEASE-MANIFESTPTO-EVIDENCE-RELEASE-MANIFESTspec/release-manifest.json1a64c109ed7a90351c41e2a418b3c0ebaf8ad975838986d2101385186b85c0d8Loading ADR-0029…
ADR-0029docs/status/decisions/0029-scalar-agu-totality-and-restart.md778e7bc53a5ae6487c051d66d0f84b6d697d6302628716bf5c745166ce982eefLoading ADR-0059…
ADR-0059docs/status/decisions/0059-mnemonic-field-encoding-closure.mdf18d13f735cfaf9f2803c754c5818f4af33d1cc42c489f0d9ce060b07bb3a196Loading ADR-0084…
ADR-0084docs/status/decisions/0084-scalar-system-and-queue-operations.mde068992fa81e2c4ac46e492391a2f784141d68e041bf0b9e0586c37217d1e08c{
"classification": [
"agu"
],
"documentation": "docs/scalar/agu/HL.PRF.md",
"id": "PTO-SCALAR-HL-PRF",
"instruction_contract": {
"artifact": "spec/evidence/instruction-contract-closure.json",
"mnemonic": "HL.PRF",
"ndf_clause": "PTO-INST-SCALAR-HL-PRF"
},
"mnemonic": "HL.PRF",
"readiness_subjects": [
"ADR-0029",
"ADR-0059",
"ADR-0084"
],
"semantic_tests": [
"PTO-AVS-AGU-HL-PRF-ALIAS-001",
"PTO-AVS-AGU-HL-PRF-BOUND-001",
"PTO-AVS-AGU-HL-PRF-EXEC-001",
"PTO-AVS-AGU-HL-PRF-FAULT-001"
],
"source": "asl/scalar/agu/HL.PRF.asl",
"surface": "scalar",
"tests": [
"PTO-AVS-AGU-HL-PRF-ALIAS-001",
"PTO-AVS-AGU-HL-PRF-BOUND-001",
"PTO-AVS-AGU-HL-PRF-EXEC-001",
"PTO-AVS-AGU-HL-PRF-FAULT-001",
"PTO-AVS-SCALAR-HL-PRF-DECODE-001"
]
}0.58.5 · Release candidate7dc8b7e5b121d2b2499a2273bebff29e2cd8681206db582d76830c7d21dbf59da307db7c3e32539a8d78adcac0008a839b4074dfc39d96af6e9eefd87f29b7e18f53e4e9f08673c8c75f590408296391cd29c610asl/scalar/agu/HL.PRF.aslasl/scalar/agu/HL.PRF.aslasl/scalar/agu/HL.PRF.asl