Operands and parameters
RegDst- Reg5 updated-base destination or discard
SrcD- Reg5 first store-data source
SrcR- Reg5 address-base source
simm17- signed address displacement
HL.SDI.PR snapshots its scalar sources, forms its encoded address, and stores one aligned little-endian 8-byte value.
PTO-SCALAR-HL-SDI-PRhl.sdi.pr SrcD, [SrcR, simm], ->{t, u, Rd}| Field | Bits | Signedness | Architectural role | Encoded zero |
|---|---|---|---|---|
RegDst | 5 | encoding-defined | Reg5 updated-base destination or discard | Encoded zero discards this result without suppressing the instruction's other effects. |
SrcD | 5 | encoding-defined | Reg5 first store-data source | Encoded zero reads the architectural zero GPR. |
SrcR | 5 | encoding-defined | Reg5 address-base source | Encoded zero reads the architectural zero GPR. |
simm17 | 17 | signed | signed address displacement | Encoded zero supplies a zero displacement; it does not denote omission. |
Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.
| Decoded item | Bit range | Value |
|---|---|---|
| simm17 | 47:41 | variable |
| SrcR | 40:36 | variable |
| SrcD | 35:31 | variable |
| Constant | 30:28 | 3'b011 |
| simm17 | 27:23 | variable |
| Constant | 22:16 | 7'b1011001 |
| RegDst | 15:11 | variable |
| simm17 | 10:6 | variable |
| Constant | 5:0 | 6'b101110 |
{
"reg": [
{
"bits": 6,
"name": "6'b101110"
},
{
"bits": 5,
"name": "simm17"
},
{
"bits": 5,
"name": "RegDst"
},
{
"bits": 7,
"name": "7'b1011001"
},
{
"bits": 5,
"name": "simm17"
},
{
"bits": 3,
"name": "3'b011"
},
{
"bits": 5,
"name": "SrcD"
},
{
"bits": 5,
"name": "SrcR"
},
{
"bits": 7,
"name": "simm17"
}
],
"config": {
"bits": 48,
"fontsize": 13,
"hspace": 900,
"lanes": 2,
"offset": 0
}
}hl.sdi.pr SrcD, [SrcR, simm], ->{t, u, Rd}
RegDstSrcDSrcRsimm17This Operation comes directly from the instruction owner; the page does not rewrite its behavior.
readonly func InstructionContractOperation_HL_SDI_PR() => ScalarOperationbegin return ScalarOperation_HL_SDI_PR;end;readonly func InstructionContractHandler_HL_SDI_PR() => ScalarSemanticHandlerbegin return ScalarHandler_ExecuteScalarStore;end;
pure func InstructionContractAGUAction_HL_SDI_PR() => ScalarAGUActionbegin return ScalarAGU_Store;end;
pure func InstructionContractAGUAddressKind_HL_SDI_PR() => ScalarAGUAddressKindbegin return ScalarAGU_Immediate;end;
pure func InstructionContractAGUSizeBytes_HL_SDI_PR() => integer {1,2,4,8}begin return 8;end;
pure func InstructionContractAGUOffsetScale_HL_SDI_PR() => integer {0..3}begin return 3;end;
pure func InstructionContractAGUUpdateMode_HL_SDI_PR() => AddressUpdateModebegin return AddressUpdate_PreIndex;end;
pure func InstructionContractAGUSignedLoad_HL_SDI_PR() => booleanbegin return FALSE;end;
pure func InstructionContractAGUPrefetchReturnsAddress_HL_SDI_PR() => booleanbegin return FALSE;end;// PTO-INSTRUCTION: {"assembly":["hl.sdi.pr SrcD, [SrcR, simm], ->{t, u, Rd}"],"block":[],"catalog_indices":[251],"catalog_records":[{"agu":{"action":"Store","address_kind":"Immediate","offset_scale":3,"prefetch_returns_address":false,"signed_load":false,"size_bytes":8,"update_mode":"PreIndex"},"asm":"hl.sdi.pr SrcD, [SrcR, simm], ->{t, u, Rd}","constraints":[],"encoding":[{"index":0,"mask":"0x0000707f003f","match":"0x00003059002e","width_bits":48}],"encoding_kind":"HL48","fields":[{"name":"RegDst","pieces":[{"instruction_lsb":11,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcD","pieces":[{"instruction_lsb":31,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcR","pieces":[{"instruction_lsb":36,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"simm17","pieces":[{"instruction_lsb":41,"value_lsb":0,"width":7},{"instruction_lsb":23,"value_lsb":7,"width":5},{"instruction_lsb":6,"value_lsb":12,"width":5}],"signedness":"signed","width":17}],"form_id":"hl_sdi_pr_48_8b2688251991","length_bits":48,"mnemonic":"HL.SDI.PR","semantic_family":"AGU","semantic_group":"STA/PRE_INDEX","semantic_handler":"ExecuteScalarStore","semantic_summary":"HL.SDI.PR snapshots its scalar sources, forms its encoded address, and stores one aligned little-endian 8-byte value.","status":"accepted"}],"classification":["agu"],"contract":{"block_composition":["none"],"canonical_assembly":["hl.sdi.pr SrcD, [SrcR, simm], ->{t, u, Rd}"],"defaults":["Every displayed operand field is encoded explicitly; encoded zero is a value and never denotes omission."],"encoding_class":"standalone-encoded","examples":["hl.sdi.pr SrcD, [SrcR, simm], ->{t, u, Rd}"],"exceptions":["A fixed-bit mismatch, reserved field value, or unavailable selected T/U source raises Fault_IllegalInstruction before instruction effects.","A misaligned 8-byte address raises Fault_DataAlignment before translation or permission. A later permission or bounded-memory failure raises Fault_DataPage at the original address.","A fault emits no successful memory event, performs no partial memory or destination effect, preserves pending writeback, and leaves TPC at the faulting instruction.","Recovery performs a full reissue: every address, source snapshot, preflight, memory operation, and destination is recomputed with no retained progress."],"field_contracts":{},"field_zero_meanings":{"RegDst":"Encoded zero discards this result without suppressing the instruction's other effects.","SrcD":"Encoded zero reads the architectural zero GPR.","SrcR":"Encoded zero reads the architectural zero GPR.","simm17":"Encoded zero supplies a zero displacement; it does not denote omission."},"legality":["Every encoded Reg5 source uses the complete domain: codes 0..23 select absolute GPRs, codes 24..27 select T#1..T#4, and codes 28..31 select U#1..U#4 without consumption.","Every Reg5 destination is assigned: codes 1..23 write GPRs, code 30 pushes U, code 31 pushes T, and codes 0 and 24..29 discard only that result.","simm17 assigns every signed 17-bit value -65536..65535; the encoded byte displacement is that value multiplied by 8.","Each memory address must be aligned to the 8-byte access size; a 8-byte access is the complete transfer unit."],"memory_effects":["After complete preflight, perform one little-endian 8-byte store and record one relaxed store event.","A successful overlapping store invalidates the overlapping reservation; a nonoverlapping reservation remains valid."],"operands":[{"field":"RegDst","role":"Reg5 updated-base destination or discard"},{"field":"SrcD","role":"Reg5 first store-data source"},{"field":"SrcR","role":"Reg5 address-base source"},{"field":"simm17","role":"signed address displacement"}],"ordering":["Snapshot all explicit and implicit scalar sources before destination or memory effects; duplicate and source/destination aliases observe pre-instruction values.","Complete the relaxed 8-byte memory operation, publish any result or writeback, and then advance TPC."],"standalone_opcode":true,"state_effects":["Sign-extend simm17, multiply it by 8, and add it modulo 2^PTO_XLEN to the SrcR base.","Pre-index mode accesses the updated base and publishes that same updated base only after successful memory completion.","Snapshot every store-data source before any memory effect or destination publication.","Successful execution advances TPC by 6 bytes; a rejected or faulting attempt does not retire."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-SCALAR-HL-SDI-PR","mnemonic":"HL.SDI.PR","summary":"HL.SDI.PR snapshots its scalar sources, forms its encoded address, and stores one aligned little-endian 8-byte value.","surface":"scalar"}// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}// DOC-BEGIN: decodereadonly func InstructionContractOperation_HL_SDI_PR() => ScalarOperationbegin return ScalarOperation_HL_SDI_PR;end;// DOC-END: decode// DOC-BEGIN: operationreadonly func InstructionContractHandler_HL_SDI_PR() => ScalarSemanticHandlerbegin return ScalarHandler_ExecuteScalarStore;end;
pure func InstructionContractAGUAction_HL_SDI_PR() => ScalarAGUActionbegin return ScalarAGU_Store;end;
pure func InstructionContractAGUAddressKind_HL_SDI_PR() => ScalarAGUAddressKindbegin return ScalarAGU_Immediate;end;
pure func InstructionContractAGUSizeBytes_HL_SDI_PR() => integer {1,2,4,8}begin return 8;end;
pure func InstructionContractAGUOffsetScale_HL_SDI_PR() => integer {0..3}begin return 3;end;
pure func InstructionContractAGUUpdateMode_HL_SDI_PR() => AddressUpdateModebegin return AddressUpdate_PreIndex;end;
pure func InstructionContractAGUSignedLoad_HL_SDI_PR() => booleanbegin return FALSE;end;
pure func InstructionContractAGUPrefetchReturnsAddress_HL_SDI_PR() => booleanbegin return FALSE;end;// DOC-END: operation
HL.SDI.PR is a standalone 48-bit AGU instruction that forms a signed-immediate address and stores one aligned little-endian 8-byte value.
HL.SDI.PR sign-extends simm17 from its complete -65536..65535 domain, multiplies it by 8, and adds the displacement modulo 2^PTO_XLEN to the snapshotted SrcR base.
After complete preflight, the instruction performs one little-endian 8-byte store from its snapshotted store-data source.
Pre-index mode accesses the updated base and publishes that same updated base only after successful memory completion.
SrcR supplies the base; simm17 supplies the signed displacement. Every encoded Reg5 source among SrcD, SrcR uses codes 0..23 for GPRs, 24..27 for T#1..T#4, and 28..31 for U#1..U#4 without consumption.SrcD supplies store data; RegDst receives the updated base; destination codes 1..23 write GPRs, 30 pushes U, 31 pushes T, and 0 plus 24..29 discard only that result.simm17 assigns every signed value from -65536 through 65535; encoded zero is a zero displacement, not omission.All explicit and implicit scalar sources are snapshotted before memory or destination effects, so aliases observe pre-instruction values.
A successful attempt records one relaxed store event, invalidates an overlapping reservation but preserves a nonoverlapping one, and advances TPC by 6 bytes.
Each effective address must satisfy 8-byte alignment. Misalignment raises Fault_DataAlignment before translation; a later permission or bounded-memory failure raises Fault_DataPage at the original address.
A fault records no successful memory event, performs no partial memory, destination, or writeback effect, preserves pending writeback, and leaves the faulting TPC available for full reissue.
A fixed-bit mismatch, reserved field value, or unavailable selected T/U source raises Fault_IllegalInstruction before instruction effects.
This example demonstrates the address calculation only; exact behavior remains in the current ASL and instruction contract.
With the base set to 0x100 and the signed immediate set to 2, the displacement is 16 and base plus displacement is 0x110. The memory access uses 0x110. If aligned and permitted, the instruction stores 8 bytes at that address.
Bodies come from owning ASL. Dragging or buttons change only this page-session view order.
No NDF clause is attached to this unit.
12 matching entries
PTO-AVS-AGU-HL-SDI-PR-ALIAS-001tests/asl/scalar/agu/HL.SDI.PR/scalar-exec-hl-sdi-pr-registers-001.asl64b07af89723ecc1a87748d98a3ef01b14f7cd668cc9abde80ac00a8e721da05PTO-AVS-AGU-HL-SDI-PR-BOUND-001tests/asl/scalar/agu/HL.SDI.PR/scalar-bound-hl-sdi-pr-address-001.asl43609af4f1f97347b39536d1bfbaefb993185835787f088214f9f7f7e52b756bPTO-AVS-AGU-HL-SDI-PR-EXEC-001tests/asl/scalar/agu/HL.SDI.PR/scalar-exec-hl-sdi-pr-direct-001.asl550463fae07d10b7b0f97f810f5e1f22bbda2f2576e9cc65e8da7b7cb53dfbbbPTO-AVS-AGU-HL-SDI-PR-FAULT-001tests/asl/scalar/agu/HL.SDI.PR/scalar-fault-hl-sdi-pr-precise-001.asl9bde9af95583baff8a2bc92253a0d5df20779bbb1885a679f8b766182e33e98dPTO-AVS-SCALAR-HL-SDI-PR-DECODE-001tests/asl/scalar/agu/HL.SDI.PR/scalar-decode-hl-sdi-pr-canonical-001.asl749c12df9c6c722b78739be5e24d28ffea5e2161423615419a91e271b665b456PTO-EVIDENCE-RELEASE-TRACEABILITYPTO-EVIDENCE-RELEASE-TRACEABILITYspec/evidence/release-traceability-readiness.jsonc7327021d39dc67ac5564bc55073b3870a397d79ac8d9648284d56e33bc14a3ePTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREPTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREspec/evidence/instruction-contract-closure.json3ef2bb62421c79dff8fa77a1c7983923b523244b8090812883ef81286ca8106aPTO-EVIDENCE-ARCHITECTURE-READINESSPTO-EVIDENCE-ARCHITECTURE-READINESSspec/evidence/architecture-readiness.json4b0b85199101251bea744e0f3591cc31906909dc80d5ab651c417a936036a004PTO-EVIDENCE-RELEASE-GATE-READINESSPTO-EVIDENCE-RELEASE-GATE-READINESSspec/evidence/release-gate-readiness.jsona0f4d2b6920c08981ea55fd8ef820708a40d4feb5402c5150e8e9ab532d84ce0PTO-EVIDENCE-RELEASE-MANIFESTPTO-EVIDENCE-RELEASE-MANIFESTspec/release-manifest.json1a64c109ed7a90351c41e2a418b3c0ebaf8ad975838986d2101385186b85c0d8Loading ADR-0029…
ADR-0029docs/status/decisions/0029-scalar-agu-totality-and-restart.md778e7bc53a5ae6487c051d66d0f84b6d697d6302628716bf5c745166ce982eefLoading ADR-0059…
ADR-0059docs/status/decisions/0059-mnemonic-field-encoding-closure.mdf18d13f735cfaf9f2803c754c5818f4af33d1cc42c489f0d9ce060b07bb3a196{
"classification": [
"agu"
],
"documentation": "docs/scalar/agu/HL.SDI.PR.md",
"id": "PTO-SCALAR-HL-SDI-PR",
"instruction_contract": {
"artifact": "spec/evidence/instruction-contract-closure.json",
"mnemonic": "HL.SDI.PR",
"ndf_clause": "PTO-INST-SCALAR-HL-SDI-PR"
},
"mnemonic": "HL.SDI.PR",
"readiness_subjects": [
"ADR-0029",
"ADR-0059"
],
"semantic_tests": [
"PTO-AVS-AGU-HL-SDI-PR-ALIAS-001",
"PTO-AVS-AGU-HL-SDI-PR-BOUND-001",
"PTO-AVS-AGU-HL-SDI-PR-EXEC-001",
"PTO-AVS-AGU-HL-SDI-PR-FAULT-001"
],
"source": "asl/scalar/agu/HL.SDI.PR.asl",
"surface": "scalar",
"tests": [
"PTO-AVS-AGU-HL-SDI-PR-ALIAS-001",
"PTO-AVS-AGU-HL-SDI-PR-BOUND-001",
"PTO-AVS-AGU-HL-SDI-PR-EXEC-001",
"PTO-AVS-AGU-HL-SDI-PR-FAULT-001",
"PTO-AVS-SCALAR-HL-SDI-PR-DECODE-001"
]
}0.58.5 · Release candidate7dc8b7e5b121d2b2499a2273bebff29e2cd868126233b58cd012a3f7671b981e29442113de1a8926c9e0f8bff7fd6748b7ccb695368865daf389f65f1bc5d6c4944a42789502be94e7b96166d0b2610fea40470aasl/scalar/agu/HL.SDI.PR.aslasl/scalar/agu/HL.SDI.PR.asl