ORW

1// PTO-INSTRUCTION: {"assembly":["orw SrcL, SrcR<{.sw,.uw,.not}><<<shamt>, ->{t, u, Rd}"],"block":[],"catalog_indices":[369],"catalog_records":[{"asm":"orw SrcL, SrcR<{.sw,.uw,.not}><<<shamt>, ->{t, u, Rd}","constraints":[],"encoding":[{"index":0,"mask":"0x0000707f","match":"0x00003025","width_bits":32}],"encoding_kind":"L32","fields":[{"name":"RegDst","pieces":[{"instruction_lsb":7,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcL","pieces":[{"instruction_lsb":15,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcR","pieces":[{"instruction_lsb":20,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcRType","pieces":[{"instruction_lsb":25,"value_lsb":0,"width":2}],"signedness":"encoding-defined","width":2},{"name":"shamt","pieces":[{"instruction_lsb":27,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5}],"form_id":"orw_32_84f7ac2ed68f","length_bits":32,"mnemonic":"ORW","semantic_family":"ALU","semantic_group":"ALU","semantic_handler":"ScalarBinaryW","semantic_summary":"ORW applies the selected right-source transformation before its encoded logical left shift, performs word bitwise inclusive OR, and publishes the low 32-bit result sign-extended to XLEN.","status":"accepted"}],"classification":["alu"],"contract":{"block_composition":["none"],"canonical_assembly":["orw SrcL, SrcR<{.sw,.uw,.not}><<<shamt>, ->{t, u, Rd}"],"defaults":["SrcL, SrcR, SrcRType, shamt, and RegDst are required encoded fields; no field can be omitted.","SrcRType=00 selects .sw, SrcRType=01 selects .uw, SrcRType=10 selects .not, and SrcRType=11 selects no modifier. An omitted assembly suffix encodes SrcRType=11.","Encoded shamt zero performs no shift; every value from 0 through 31 is assigned."],"encoding_class":"standalone-encoded","examples":["orw a0, a1, ->a2","orw t#1, u#1.not<<1, ->u","orw zero, a0.sw, ->zero"],"exceptions":["ORW raises no arithmetic exception; the word operation keeps its low 32-bit result and sign-extends it to XLEN.","A fixed-bit mismatch or unavailable selected T/U source raises Fault_IllegalInstruction before the destination effect and before TPC advances."],"field_contracts":{},"field_zero_meanings":{"RegDst":"Encoded zero discards the result.","SrcL":"Encoded zero reads the architectural zero GPR.","SrcR":"Encoded zero reads the architectural zero GPR.","SrcRType":"Encoded zero selects .sw and sign-extends SrcR[31:0].","shamt":"Encoded zero performs no shift."},"legality":["SrcL and SrcR codes 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4 without consumption.","RegDst codes 0 and 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write GPRs.","All four SrcRType encodings are assigned. The logical family uses .not while the arithmetic family uses .neg; ORW uses .not.","Every five-bit shamt value from 0 through 31 is legal."],"memory_effects":["none"],"operands":[{"field":"RegDst","role":"Reg5 destination or discard"},{"field":"SrcL","role":"left Reg5 source"},{"field":"SrcR","role":"right Reg5 source"},{"field":"SrcRType","role":"right-source transformation selector"},{"field":"shamt","role":"post-transformation logical-left-shift amount"}],"ordering":["Snapshot both sources before the destination effect so duplicate sources, destination aliases, and queue publication use pre-instruction values.","Publish the result, then advance TPC by four bytes."],"standalone_opcode":true,"state_effects":["Transform SrcR, perform the logical left shift, compute the bitwise inclusive OR with SrcL[31:0], and sign-extend the low 32-bit result to XLEN.","Apply the selected SrcRType transformation before the logical left shift. The transformation and shift affect SrcR only; SrcL is unchanged before the final operation.","Destination codes 0 and 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write GPRs; source queues are non-consuming.","No memory, reservation, descriptor, numeric-flag, trap, block, privilege, or control-flow state changes except the successful TPC advance."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-SCALAR-ORW","mnemonic":"ORW","summary":"ORW applies the selected right-source transformation before its encoded logical left shift, performs word bitwise inclusive OR, and publishes the low 32-bit result sign-extended to XLEN.","surface":"scalar"}2// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}3// DOC-BEGIN: decode4readonly func InstructionContractOperation_ORW()5    => ScalarOperation6begin7    return ScalarOperation_ORW;8end;9// DOC-END: decode10// DOC-BEGIN: operation11readonly func InstructionContractHandler_ORW()12    => ScalarSemanticHandler13begin14    return ScalarHandler_ScalarBinaryW;15end;16
17pure func InstructionContractRightModifier_ORW(encoded: bits(2))18    => ScalarRightModifier19begin20    case encoded of21        when '00' => return ScalarRight_SignedWord;22        when '01' => return ScalarRight_UnsignedWord;23        when '10' => return ScalarRight_NegateOrNot;24        when '11' => return ScalarRight_None;25    end;26end;27
28pure func InstructionContractPreparedRight_ORW(29    right: Word,30    encoded_modifier: bits(2),31    shift_amount: integer {0..31})32    => Word33begin34    let modifier = InstructionContractRightModifier_ORW(encoded_modifier);35    let transformed = ApplyScalarRightModifier(right, modifier, TRUE);36    let shifted = LSL(transformed, shift_amount);37    return shifted;38end;39
40pure func InstructionContractResult_ORW(41    left: Word,42    right: Word,43    encoded_modifier: bits(2),44    shift_amount: integer {0..31})45    => Word46begin47    let prepared_right = InstructionContractPreparedRight_ORW(48        right,49        encoded_modifier,50        shift_amount);51    return ScalarBinaryW(ScalarBinary_OR, left, prepared_right);52end;53
54pure func InstructionContractIsLogicalFamily_ORW()55    => boolean56begin57    return TRUE;58end;59
60pure func InstructionContractIsWordOperation_ORW()61    => boolean62begin63    return TRUE;64end;65// DOC-END: operation66