HL.CASD

HL.CASD atomically compares and conditionally replaces one doubleword, then publishes the prior value.

PTO-SCALAR-HL-CASD

Assembly syntax

hl.casd [SrcL], SrcR, SrcD, ->Rdhl.casd.aq [SrcL], SrcR, SrcD, ->Rdhl.casd.rl [SrcL], SrcR, SrcD, ->Rdhl.casd.f [SrcL], SrcR, SrcD, ->Rdhl.casd.aqrl [SrcL], SrcR, SrcD, ->Rdhl.casd.aqf [SrcL], SrcR, SrcD, ->Rdhl.casd.rlf [SrcL], SrcR, SrcD, ->Rdhl.casd.aqrlf [SrcL], SrcR, SrcD, ->Rd

Assembler symbols

Assembly fields and architectural roles
Field	Bits	Signedness	Architectural role	Encoded zero
`RegDst`	5	encoding-defined	Reg5 old-value destination	Encoded zero discards the prior value.
`SrcD`	5	encoding-defined	Reg5 desired doubleword source	Encoded zero supplies numeric zero as the desired value.
`SrcL`	5	encoding-defined	Reg5 atomic address source	Encoded zero reads the architectural zero register as the address.
`SrcR`	5	encoding-defined	Reg5 expected doubleword source	Encoded zero supplies numeric zero as the expected value.
`aq`	1	encoding-defined	acquire ordering bit	Encoded zero disables acquire ordering.
`far`	1	encoding-defined	flat-address routing hint	Encoded zero selects the default flat-address route.
`rl`	1	encoding-defined	release ordering bit	Encoded zero disables release ordering.

Encoding

Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.

Encoding fields as an accessible table

Generated encoding fields for hl.casd<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> [SrcL], SrcR, SrcD, ->{t, u, Rd}
Decoded item	Bit range	Value
Constant	47:44	4'b0011
far	43	variable
aq	42	variable
rl	41	variable
SrcR	40:36	variable
SrcL	35:31	variable
Constant	30:28	3'b110
RegDst	27:23	variable
Constant	22:11	12'b000101100000
SrcD	10:6	variable
Constant	5:0	6'b001110

WaveJSON source

{
  "reg": [
    {
      "bits": 6,
      "name": "6'b001110"
    },
    {
      "bits": 5,
      "name": "SrcD"
    },
    {
      "bits": 12,
      "name": "12'b000101100000"
    },
    {
      "bits": 5,
      "name": "RegDst"
    },
    {
      "bits": 3,
      "name": "3'b110"
    },
    {
      "bits": 5,
      "name": "SrcL"
    },
    {
      "bits": 5,
      "name": "SrcR"
    },
    {
      "bits": 1,
      "name": "rl"
    },
    {
      "bits": 1,
      "name": "aq"
    },
    {
      "bits": 1,
      "name": "far"
    },
    {
      "bits": 4,
      "name": "4'b0011"
    }
  ],
  "config": {
    "bits": 48,
    "fontsize": 13,
    "hspace": 900,
    "lanes": 2,
    "offset": 0
  }
}

hl.casd<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> [SrcL], SrcR, SrcD, ->{t, u, Rd}

Instruction contract

Operands and parameters

SrcL: Reg5 atomic address source
SrcR: Reg5 expected doubleword source
SrcD: Reg5 desired doubleword source
RegDst: Reg5 old-value destination
aq: acquire ordering bit
rl: release ordering bit
far: flat-address routing hint

Constraints, checks, and faults

All 32 SrcL, SrcR, and SrcD Reg5 encodings are assigned: 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4.
All 32 RegDst encodings are assigned. Code 0 and codes 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write the named absolute GPR.
All aq, rl, and far combinations are assigned.
The effective address must be aligned to 8 bytes.
The effective address must be aligned to 8 bytes. Alignment, read translation/permission, write translation/permission, and translated-address equality are checked before effects.
On a fault, no destination, memory write, event, reservation update, or TPC advance occurs. Trap entry saves the original TPC and recovery restores it for full reissue.
An undecodable fixed-bit pattern raises Fault_IllegalInstruction before effects. All explicit field values are assigned.

State reads, writes, and result

Snapshot SrcL, SrcR, and SrcD before any memory or destination effect.
Publish the prior value after every nonfaulting match or mismatch; publish no value on fault.
The 64-bit old value is published unchanged.
Successful execution advances TPC by 6 bytes. A fault saves and later restores the original TPC for full reissue.
After aligned read and write preflight identify the same translated location, atomically read one 8-byte doubleword and compare it with SrcR truncated to 8 bytes.
On equality, store SrcD truncated to 8 bytes and set write_performed in the atomic event. On mismatch, preserve memory and emit an ordered atomic event with write_performed false.
Only a successful overlapping write invalidates the local 64-byte-line reservation; mismatch and nonoverlap preserve it.
The 64-bit old value is published unchanged.
aq=0,rl=0 records relaxed ordering; aq=1,rl=0 acquire; aq=0,rl=1 release; aq=1,rl=1 acquire-release for both match and mismatch.
far changes only the route hint in the reference profile.

ASL pseudocode

This Operation comes directly from the instruction owner; the page does not rewrite its behavior.

Decode source binding

4readonly func InstructionContractOperation_HL_CASD() => ScalarOperation5begin6    return ScalarOperation_HL_CASD;7end;

Operation source binding

10readonly func InstructionContractHandler_HL_CASD() => ScalarSemanticHandler11begin12    return ScalarHandler_CompareAndSwap;13end;14
15pure func InstructionContractCompareSizeBytes_HL_CASD()16    => integer {1,2,4,8}17begin18    return 8;19end;20
21pure func InstructionContractHasFarField_HL_CASD()22    => boolean23begin24    return TRUE;25end;26
27pure func InstructionContractZeroExtendsOldValue_HL_CASD()28    => boolean29begin30    return FALSE;31end;32
33pure func InstructionContractSignExtendsOldValue_HL_CASD()34    => boolean35begin36    return FALSE;37end;

View the complete ASL owner

1// PTO-INSTRUCTION: {"assembly":["hl.casd [SrcL], SrcR, SrcD, ->Rd","hl.casd.aq [SrcL], SrcR, SrcD, ->Rd","hl.casd.rl [SrcL], SrcR, SrcD, ->Rd","hl.casd.f [SrcL], SrcR, SrcD, ->Rd","hl.casd.aqrl [SrcL], SrcR, SrcD, ->Rd","hl.casd.aqf [SrcL], SrcR, SrcD, ->Rd","hl.casd.rlf [SrcL], SrcR, SrcD, ->Rd","hl.casd.aqrlf [SrcL], SrcR, SrcD, ->Rd"],"block":[],"catalog_indices":[124],"catalog_records":[{"asm":"hl.casd<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> [SrcL], SrcR, SrcD, ->{t, u, Rd}","constraints":[],"encoding":[{"index":0,"mask":"0xf000707ff83f","match":"0x3000600b000e","width_bits":48}],"encoding_kind":"HL48","fields":[{"name":"RegDst","pieces":[{"instruction_lsb":23,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcD","pieces":[{"instruction_lsb":6,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcL","pieces":[{"instruction_lsb":31,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcR","pieces":[{"instruction_lsb":36,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"aq","pieces":[{"instruction_lsb":42,"value_lsb":0,"width":1}],"signedness":"encoding-defined","width":1},{"name":"far","pieces":[{"instruction_lsb":43,"value_lsb":0,"width":1}],"signedness":"encoding-defined","width":1},{"name":"rl","pieces":[{"instruction_lsb":41,"value_lsb":0,"width":1}],"signedness":"encoding-defined","width":1}],"form_id":"hl_casd_48_fbb5c4256d30","length_bits":48,"mnemonic":"HL.CASD","semantic_family":"AMO","semantic_group":"AMO","semantic_handler":"CompareAndSwap","semantic_summary":"HL.CASD atomically compares and conditionally replaces one doubleword, then publishes the prior value.","status":"accepted"}],"classification":["amo"],"contract":{"block_composition":["none"],"canonical_assembly":["hl.casd [SrcL], SrcR, SrcD, ->Rd","hl.casd.aq [SrcL], SrcR, SrcD, ->Rd","hl.casd.rl [SrcL], SrcR, SrcD, ->Rd","hl.casd.f [SrcL], SrcR, SrcD, ->Rd","hl.casd.aqrl [SrcL], SrcR, SrcD, ->Rd","hl.casd.aqf [SrcL], SrcR, SrcD, ->Rd","hl.casd.rlf [SrcL], SrcR, SrcD, ->Rd","hl.casd.aqrlf [SrcL], SrcR, SrcD, ->Rd"],"defaults":["SrcL, SrcR, SrcD, and RegDst are required Reg5 fields. Encoded source zero reads the architectural zero register; encoded destination zero discards the old value.","aq=0 and rl=0 select relaxed ordering. aq=1 selects acquire, rl=1 selects release, and aq=1 with rl=1 selects acquire-release.","far=0 selects the default flat-address route. far=1 is a profile routing hint; the reference profile preserves the same address and atomic result."],"encoding_class":"standalone-encoded","examples":["hl.casd [a0], a1, a2, ->a3","hl.casd.aqrlf [t#1], u#1, a0, ->u"],"exceptions":["The effective address must be aligned to 8 bytes. Alignment, read translation/permission, write translation/permission, and translated-address equality are checked before effects.","On a fault, no destination, memory write, event, reservation update, or TPC advance occurs. Trap entry saves the original TPC and recovery restores it for full reissue.","An undecodable fixed-bit pattern raises Fault_IllegalInstruction before effects. All explicit field values are assigned."],"field_contracts":{},"field_zero_meanings":{"RegDst":"Encoded zero discards the prior value.","SrcL":"Encoded zero reads the architectural zero register as the address.","SrcR":"Encoded zero supplies numeric zero as the expected value.","SrcD":"Encoded zero supplies numeric zero as the desired value.","aq":"Encoded zero disables acquire ordering.","rl":"Encoded zero disables release ordering.","far":"Encoded zero selects the default flat-address route."},"legality":["All 32 SrcL, SrcR, and SrcD Reg5 encodings are assigned: 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4.","All 32 RegDst encodings are assigned. Code 0 and codes 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write the named absolute GPR.","All aq, rl, and far combinations are assigned.","The effective address must be aligned to 8 bytes."],"memory_effects":["After aligned read and write preflight identify the same translated location, atomically read one 8-byte doubleword and compare it with SrcR truncated to 8 bytes.","On equality, store SrcD truncated to 8 bytes and set write_performed in the atomic event. On mismatch, preserve memory and emit an ordered atomic event with write_performed false.","Only a successful overlapping write invalidates the local 64-byte-line reservation; mismatch and nonoverlap preserve it.","The 64-bit old value is published unchanged."],"operands":[{"field":"SrcL","role":"Reg5 atomic address source"},{"field":"SrcR","role":"Reg5 expected doubleword source"},{"field":"SrcD","role":"Reg5 desired doubleword source"},{"field":"RegDst","role":"Reg5 old-value destination"},{"field":"aq","role":"acquire ordering bit"},{"field":"rl","role":"release ordering bit"},{"field":"far","role":"flat-address routing hint"}],"ordering":["aq=0,rl=0 records relaxed ordering; aq=1,rl=0 acquire; aq=0,rl=1 release; aq=1,rl=1 acquire-release for both match and mismatch.","far changes only the route hint in the reference profile."],"standalone_opcode":true,"state_effects":["Snapshot SrcL, SrcR, and SrcD before any memory or destination effect.","Publish the prior value after every nonfaulting match or mismatch; publish no value on fault.","The 64-bit old value is published unchanged.","Successful execution advances TPC by 6 bytes. A fault saves and later restores the original TPC for full reissue."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-SCALAR-HL-CASD","mnemonic":"HL.CASD","summary":"HL.CASD atomically compares and conditionally replaces one doubleword, then publishes the prior value.","surface":"scalar"}2// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}3// DOC-BEGIN: decode4readonly func InstructionContractOperation_HL_CASD() => ScalarOperation5begin6    return ScalarOperation_HL_CASD;7end;8// DOC-END: decode9// DOC-BEGIN: operation10readonly func InstructionContractHandler_HL_CASD() => ScalarSemanticHandler11begin12    return ScalarHandler_CompareAndSwap;13end;14
15pure func InstructionContractCompareSizeBytes_HL_CASD()16    => integer {1,2,4,8}17begin18    return 8;19end;20
21pure func InstructionContractHasFarField_HL_CASD()22    => boolean23begin24    return TRUE;25end;26
27pure func InstructionContractZeroExtendsOldValue_HL_CASD()28    => boolean29begin30    return FALSE;31end;32
33pure func InstructionContractSignExtendsOldValue_HL_CASD()34    => boolean35begin36    return FALSE;37end;38// DOC-END: operation39

Behavior

purpose

What HL.CASD does

HL.CASD atomically compares the doubleword at SrcL with SrcR; equality stores SrcD, while both paths publish the prior 64-bit value.

mechanism

Atomic mechanism

The ASL DOC contract selects ScalarHandler_CompareAndSwap with an access width of 8 bytes.

Match and mismatch both emit one ordered atomic event; only the matching path marks a write as performed.

inputs outputs

Inputs and result

SrcL carries the Reg5 atomic address source; SrcR carries the Reg5 expected doubleword source; SrcD carries the Reg5 desired doubleword source; RegDst carries the Reg5 old-value destination; aq carries the acquire ordering bit; rl carries the release ordering bit; far carries the flat-address routing hint.

aq and rl select relaxed, acquire, release, or acquire-release ordering; far is a profile routing hint and does not change the architectural result in the reference profile.

effects

Effects and ordering

After successful preflight, the old value is published even on comparison mismatch; memory changes only on equality.

A completed write invalidates an overlapping local 64-byte-line reservation, preserves a nonoverlapping reservation, and advances TPC by 6 bytes.

constraints

Legality and precise faults

The effective address must be aligned to 8 bytes. Alignment, translation, and permission checks precede architectural effects.

A failing preflight publishes no destination, memory event, reservation update, or retirement effect; the saved original TPC supports full reissue.

example

illustrative example

This example only shows one accepted spelling; the generated contract below remains authoritative.

For a first reading, use hl.casd [SrcL], SrcR, SrcD, ->Rd and then vary only the ordering or route modifiers described above.

NDF clauses

Bodies come from owning ASL. Dragging or buttons change only this page-session view order.

No NDF clause is attached to this unit.

Evidence index

12 matching entries

Executable evidence4

canonical HL.CASD catalog and ASL contract remain aligned
1. surfaceSCALAR
2. ownerHL.CASD
3. categoryDECODE-POSITIVE
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-HL-CASD-DECODE-001
Path
tests/asl/scalar/amo/HL.CASD/scalar-decode-hl-casd-canonical-001.asl
Kind / role
decode-positive
Requirements
PTO-INST-SCALAR-HL-CASD
Pass condition
all canonical decode and contract assertions hold
SHA-256
8572d99804417266b811cd28c0cebbfd0dc1a489175bbd65d07acd7f0696ff88
Open exact source ↗ for PTO-AVS-SCALAR-HL-CASD-DECODE-001
HL.CASD matching compare conditionally stores and publishes the prior value
1. surfaceSCALAR
2. ownerHL.CASD
3. categoryEXECUTION
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-HL-CASD-MATCH-001
Path
tests/asl/scalar/amo/HL.CASD/scalar-exec-hl-casd-match-001.asl
Kind / role
execution
Requirements
PTO-INST-SCALAR-HL-CASD
Pass condition
memory, destination, atomic event, reservation, ordering, and TPC match the HL.CASD contract
SHA-256
080e6b0f20ce92f6310bc453dd5692eabfb4de5c95480759d81f16bcf3fb04ba
Open exact source ↗ for PTO-AVS-SCALAR-HL-CASD-MATCH-001
HL.CASD mismatch is an ordered atomic read with no write
1. surfaceSCALAR
2. ownerHL.CASD
3. categoryBOUNDARY
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-HL-CASD-MISMATCH-001
Path
tests/asl/scalar/amo/HL.CASD/scalar-bound-hl-casd-mismatch-001.asl
Kind / role
boundary
Requirements
PTO-INST-SCALAR-HL-CASD
Pass condition
memory, U destination, mismatch event, reservation preservation, and TPC match the HL.CASD contract
SHA-256
ee6a167b93c21dbc5aaecbf15d3cc95e632743e5cf21f2f68933456e92ca88e7
Open exact source ↗ for PTO-AVS-SCALAR-HL-CASD-MISMATCH-001
HL.CASD access fault is precise and preserves destination and reservation
1. surfaceSCALAR
2. ownerHL.CASD
3. categoryFAULT
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-HL-CASD-PRECISE-001
Path
tests/asl/scalar/amo/HL.CASD/scalar-fault-hl-casd-precise-001.asl
Kind / role
fault
Requirements
PTO-INST-SCALAR-HL-CASD
Pass condition
trap, memory, event, destination, reservation, recovery, and TPC match the HL.CASD contract
SHA-256
4e2710e63795d863b442ec5e7aa46e3fd67c9d3373ea424c63c3de351c270bfc
Open exact source ↗ for PTO-AVS-SCALAR-HL-CASD-PRECISE-001

Commit-scoped evidence5

spec/evidence/release-traceability-readiness.json · closedPTO-EVIDENCE-RELEASE-TRACEABILITY
Sources and references
Complete stable ID
PTO-EVIDENCE-RELEASE-TRACEABILITY
Path
spec/evidence/release-traceability-readiness.json
Kind / role
ASL/NDF/documentation/AVS traceability
SHA-256
c7327021d39dc67ac5564bc55073b3870a397d79ac8d9648284d56e33bc14a3e
Open exact source ↗ for PTO-EVIDENCE-RELEASE-TRACEABILITY
spec/evidence/instruction-contract-closure.json · closedPTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSURE
Sources and references
Complete stable ID
PTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSURE
Path
spec/evidence/instruction-contract-closure.json
Kind / role
mnemonic and encoding contract closure
SHA-256
3ef2bb62421c79dff8fa77a1c7983923b523244b8090812883ef81286ca8106a
Open exact source ↗ for PTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSURE
spec/evidence/architecture-readiness.json · openPTO-EVIDENCE-ARCHITECTURE-READINESS
Sources and references
Complete stable ID
PTO-EVIDENCE-ARCHITECTURE-READINESS
Path
spec/evidence/architecture-readiness.json
Kind / role
architecture maturity and blockers
SHA-256
4b0b85199101251bea744e0f3591cc31906909dc80d5ab651c417a936036a004
Open exact source ↗ for PTO-EVIDENCE-ARCHITECTURE-READINESS
spec/evidence/release-gate-readiness.json · ready-for-exact-head-verificationPTO-EVIDENCE-RELEASE-GATE-READINESS
Sources and references
Complete stable ID
PTO-EVIDENCE-RELEASE-GATE-READINESS
Path
spec/evidence/release-gate-readiness.json
Kind / role
exact-head gate readiness
SHA-256
a0f4d2b6920c08981ea55fd8ef820708a40d4feb5402c5150e8e9ab532d84ce0
Open exact source ↗ for PTO-EVIDENCE-RELEASE-GATE-READINESS
spec/release-manifest.json · draftPTO-EVIDENCE-RELEASE-MANIFEST
Sources and references
Complete stable ID
PTO-EVIDENCE-RELEASE-MANIFEST
Path
spec/release-manifest.json
Kind / role
release content and encoding fingerprints
SHA-256
1a64c109ed7a90351c41e2a418b3c0ebaf8ad975838986d2101385186b85c0d8
Open exact source ↗ for PTO-EVIDENCE-RELEASE-MANIFEST

Decision history3

Production memory events and atomic corners · accepted
1. decision recordADR
2. case0020
Decision record
Loading ADR-0020…
Sources and references
Complete stable ID
ADR-0020
Path
docs/status/decisions/0020-production-memory-events-and-atomic-corners.md
Affected units
PTO-ARCH-MEMORY-MODEL-ADDRESS-SPACE, PTO-ARCH-MEMORY-MODEL-ATOMICITY, PTO-ARCH-MEMORY-MODEL-FAULT-PRECISION, PTO-ARCH-MEMORY-MODEL-GLOBAL-MEMORY-ACCESS, PTO-ARCH-MEMORY-MODEL-MEMORY-EVENTS, PTO-ARCH-MEMORY-MODEL-ORDERING, PTO-BLOCK-BSTART-GMOV, PTO-BLOCK-BSTART-MGATHER, PTO-BLOCK-BSTART-MGATHER-CAS, PTO-BLOCK-BSTART-MGATHER-MASK, PTO-BLOCK-BSTART-MSCATTER, PTO-BLOCK-BSTART-MSCATTER-MASK, PTO-BLOCK-BSTART-TLOAD, PTO-BLOCK-BSTART-TPREFETCH, PTO-BLOCK-BSTART-TSTORE, PTO-SCALAR-CASB, PTO-SCALAR-CASD, PTO-SCALAR-CASH, PTO-SCALAR-CASW, PTO-SCALAR-DMA, PTO-SCALAR-HL-CASB, PTO-SCALAR-HL-CASD, PTO-SCALAR-HL-CASH, PTO-SCALAR-HL-CASW, PTO-SCALAR-LD-ADD, PTO-SCALAR-LD-AND, PTO-SCALAR-LD-OR, PTO-SCALAR-LD-SMAX, PTO-SCALAR-LD-SMIN, PTO-SCALAR-LD-UMAX, PTO-SCALAR-LD-UMIN, PTO-SCALAR-LD-XOR, PTO-SCALAR-LR-B, PTO-SCALAR-LR-D, PTO-SCALAR-LR-H, PTO-SCALAR-LR-W, PTO-SCALAR-LW-ADD, PTO-SCALAR-LW-AND, PTO-SCALAR-LW-OR, PTO-SCALAR-LW-SMAX, PTO-SCALAR-LW-SMIN, PTO-SCALAR-LW-UMAX, PTO-SCALAR-LW-UMIN, PTO-SCALAR-LW-XOR, PTO-SCALAR-SC-B, PTO-SCALAR-SC-D, PTO-SCALAR-SC-H, PTO-SCALAR-SC-W, PTO-SCALAR-SD-ADD, PTO-SCALAR-SD-AND, PTO-SCALAR-SD-OR, PTO-SCALAR-SD-SMAX, PTO-SCALAR-SD-SMIN, PTO-SCALAR-SD-UMAX, PTO-SCALAR-SD-UMIN, PTO-SCALAR-SD-XOR, PTO-SCALAR-SW-ADD, PTO-SCALAR-SW-AND, PTO-SCALAR-SW-OR, PTO-SCALAR-SW-SMAX, PTO-SCALAR-SW-SMIN, PTO-SCALAR-SW-UMAX, PTO-SCALAR-SW-UMIN, PTO-SCALAR-SW-XOR, PTO-SCALAR-SWAPB, PTO-SCALAR-SWAPD, PTO-SCALAR-SWAPH, PTO-SCALAR-SWAPW, PTO-TILE-GMOV, PTO-TILE-MGATHER, PTO-TILE-MGATHER-CAS, PTO-TILE-MGATHER-MASK, PTO-TILE-MSCATTER, PTO-TILE-MSCATTER-MASK, PTO-TILE-TLOAD, PTO-TILE-TMOV, PTO-TILE-TPREFETCH, PTO-TILE-TSTORE
Affected NDF
PTO-ARCH-GM-ACCESS-001, PTO-BSTART-GMOV-COLLECTIVE-001, PTO-BSTART-MGATHER-CAS-SCHEMA-001, PTO-BSTART-MGATHER-MASK-SCHEMA-001, PTO-BSTART-MGATHER-SCHEMA-001, PTO-BSTART-MSCATTER-MASK-SCHEMA-001, PTO-BSTART-MSCATTER-SCHEMA-001, PTO-BSTART-TLOAD-CUBE-001, PTO-BSTART-TLOAD-MEMORY-001, PTO-BSTART-TPREFETCH-MEMORY-001, PTO-BSTART-TSTORE-CUBE-001, PTO-BSTART-TSTORE-MEMORY-001, PTO-GMOV-CORE4-PEER-001, PTO-MGATHER-BYTE-DISPLACEMENT-001, PTO-MGATHER-CAS-ATOMIC-001, PTO-MGATHER-CAS-PUBLICATION-001, PTO-MGATHER-MASK-PREDICATE-001, PTO-MGATHER-MASK-PUBLICATION-001, PTO-MGATHER-MASK-TYPE-002, PTO-MSCATTER-BYTE-DISPLACEMENT-001, PTO-MSCATTER-DUPLICATE-ORDER-001, PTO-MSCATTER-MASK-DUPLICATE-001, PTO-MSCATTER-MASK-PREDICATE-001, PTO-MSCATTER-MASK-TYPE-002, PTO-SD-XOR-ADR-CONTRACT-001, PTO-SW-ADD-ADR-CONTRACT-001, PTO-SW-AND-ADR-CONTRACT-001, PTO-SW-OR-ADR-CONTRACT-001, PTO-SW-SMAX-ADR-CONTRACT-001, PTO-SW-SMIN-ADR-CONTRACT-001, PTO-SW-UMAX-ADR-CONTRACT-001, PTO-SW-UMIN-ADR-CONTRACT-001, PTO-SW-XOR-ADR-CONTRACT-001, PTO-SWAPB-ADR-CONTRACT-001, PTO-SWAPD-ADR-CONTRACT-001, PTO-SWAPH-ADR-CONTRACT-001, PTO-SWAPW-ADR-CONTRACT-001, PTO-TLOAD-CUBE-001, PTO-TLOAD-MEMORY-001, PTO-TMOV-CONTRACT-001, PTO-TPREFETCH-FOOTPRINT-001, PTO-TSTORE-CUBE-001, PTO-TSTORE-MEMORY-001
SHA-256
215b18f05d0b53120949373fce6a5ce22f7ab534fb22df24743a9b2b4beb2dec
Open exact decision source ↗ for ADR-0020
Scalar AMO totality, reservations, and restart · accepted
1. decision recordADR
2. case0030
Decision record
Loading ADR-0030…
Sources and references
Complete stable ID
ADR-0030
Path
docs/status/decisions/0030-scalar-amo-totality-and-reservation.md
Affected units
PTO-SCALAR-CASB, PTO-SCALAR-CASD, PTO-SCALAR-CASH, PTO-SCALAR-CASW, PTO-SCALAR-DMA, PTO-SCALAR-HL-CASB, PTO-SCALAR-HL-CASD, PTO-SCALAR-HL-CASH, PTO-SCALAR-HL-CASW, PTO-SCALAR-LD-ADD, PTO-SCALAR-LD-AND, PTO-SCALAR-LD-OR, PTO-SCALAR-LD-SMAX, PTO-SCALAR-LD-SMIN, PTO-SCALAR-LD-UMAX, PTO-SCALAR-LD-UMIN, PTO-SCALAR-LD-XOR, PTO-SCALAR-LR-B, PTO-SCALAR-LR-D, PTO-SCALAR-LR-H, PTO-SCALAR-LR-W, PTO-SCALAR-LW-ADD, PTO-SCALAR-LW-AND, PTO-SCALAR-LW-OR, PTO-SCALAR-LW-SMAX, PTO-SCALAR-LW-SMIN, PTO-SCALAR-LW-UMAX, PTO-SCALAR-LW-UMIN, PTO-SCALAR-LW-XOR, PTO-SCALAR-SC-B, PTO-SCALAR-SC-D, PTO-SCALAR-SC-H, PTO-SCALAR-SC-W, PTO-SCALAR-SD-ADD, PTO-SCALAR-SD-AND, PTO-SCALAR-SD-OR, PTO-SCALAR-SD-SMAX, PTO-SCALAR-SD-SMIN, PTO-SCALAR-SD-UMAX, PTO-SCALAR-SD-UMIN, PTO-SCALAR-SD-XOR, PTO-SCALAR-SW-ADD, PTO-SCALAR-SW-AND, PTO-SCALAR-SW-OR, PTO-SCALAR-SW-SMAX, PTO-SCALAR-SW-SMIN, PTO-SCALAR-SW-UMAX, PTO-SCALAR-SW-UMIN, PTO-SCALAR-SW-XOR, PTO-SCALAR-SWAPB, PTO-SCALAR-SWAPD, PTO-SCALAR-SWAPH, PTO-SCALAR-SWAPW
Affected NDF
PTO-SD-XOR-ADR-CONTRACT-001, PTO-SW-ADD-ADR-CONTRACT-001, PTO-SW-AND-ADR-CONTRACT-001, PTO-SW-OR-ADR-CONTRACT-001, PTO-SW-SMAX-ADR-CONTRACT-001, PTO-SW-SMIN-ADR-CONTRACT-001, PTO-SW-UMAX-ADR-CONTRACT-001, PTO-SW-UMIN-ADR-CONTRACT-001, PTO-SW-XOR-ADR-CONTRACT-001, PTO-SWAPB-ADR-CONTRACT-001, PTO-SWAPD-ADR-CONTRACT-001, PTO-SWAPH-ADR-CONTRACT-001, PTO-SWAPW-ADR-CONTRACT-001
SHA-256
110bd32b3004a8383913ac6053cc7d0a1d0b8e03e3ef7c47d83292c94a6a17eb
Open exact decision source ↗ for ADR-0030
Mnemonic and Encoded-Field Contract Closure · accepted
1. decision recordADR
2. case0059
Decision record
Loading ADR-0059…
Sources and references
Complete stable ID
ADR-0059
Path
docs/status/decisions/0059-mnemonic-field-encoding-closure.md
Affected units
PTO-ARCH-DATA-TYPES-FORMAT-DESCRIPTOR, PTO-ARCH-OVERVIEW-ARCHITECTURE, PTO-ARCH-OVERVIEW-ENCODING-OWNERSHIP, PTO-ARCH-OVERVIEW-INSTRUCTION-CLASSIFICATION, PTO-BLOCK-B-CATR, PTO-BLOCK-B-DATR, PTO-BLOCK-B-DIM, PTO-BLOCK-B-FPATR, PTO-BLOCK-B-HINT, PTO-BLOCK-B-IOR, PTO-BLOCK-B-IOS, PTO-BLOCK-B-IOT, PTO-BLOCK-BSTART, PTO-BLOCK-BSTART-CALL, PTO-BLOCK-BSTART-FP, PTO-BLOCK-BSTART-GMOV, PTO-BLOCK-BSTART-ICALL, PTO-BLOCK-BSTART-MGATHER, PTO-BLOCK-BSTART-MGATHER-CAS, PTO-BLOCK-BSTART-MGATHER-MASK, PTO-BLOCK-BSTART-MSCATTER, PTO-BLOCK-BSTART-MSCATTER-MASK, PTO-BLOCK-BSTART-SFU, PTO-BLOCK-BSTART-STD, PTO-BLOCK-BSTART-SYS, PTO-BLOCK-BSTART-TEPL, PTO-BLOCK-BSTART-TGEMV, PTO-BLOCK-BSTART-TGEMV-ACC, PTO-BLOCK-BSTART-TGEMV-BIAS, PTO-BLOCK-BSTART-TGEMVMX, PTO-BLOCK-BSTART-TGEMVMX-ACC, PTO-BLOCK-BSTART-TGEMVMX-BIAS, PTO-BLOCK-BSTART-TLOAD, PTO-BLOCK-BSTART-TMATMUL, PTO-BLOCK-BSTART-TMATMUL-ACC, PTO-BLOCK-BSTART-TMATMUL-BIAS, PTO-BLOCK-BSTART-TMATMULMX, PTO-BLOCK-BSTART-TMATMULMX-ACC, PTO-BLOCK-BSTART-TMATMULMX-BIAS, PTO-BLOCK-BSTART-TMOV, PTO-BLOCK-BSTART-TPREFETCH, PTO-BLOCK-BSTART-TSTORE, PTO-BLOCK-BSTART-VEC, PTO-BLOCK-BSTOP, PTO-BLOCK-C-B-DIMI, PTO-BLOCK-C-BSTART, PTO-BLOCK-C-BSTART-FP, PTO-BLOCK-C-BSTART-STD, PTO-BLOCK-C-BSTART-SYS, PTO-BLOCK-C-BSTOP, PTO-BLOCK-ERCOV, PTO-BLOCK-ESAVE, PTO-BLOCK-FENTRY, PTO-BLOCK-FEXIT, PTO-BLOCK-FRET-RA, PTO-BLOCK-FRET-STK, PTO-BLOCK-HL-QMT, PTO-BLOCK-HL-QPOP, PTO-BLOCK-HL-QPUSH, PTO-BLOCK-L-BSTOP, PTO-BLOCK-MCOPY, PTO-BLOCK-MSET, PTO-BLOCK-XB, PTO-SCALAR-ACRC, PTO-SCALAR-ACRE, PTO-SCALAR-ADD, PTO-SCALAR-ADDI, PTO-SCALAR-ADDIW, PTO-SCALAR-ADDTPC, PTO-SCALAR-ADDW, PTO-SCALAR-AND, PTO-SCALAR-ANDI, PTO-SCALAR-ANDIW, PTO-SCALAR-ANDW, PTO-SCALAR-ASSERT, PTO-SCALAR-BC-IALL, PTO-SCALAR-BC-IVA, PTO-SCALAR-BCNT, PTO-SCALAR-BIC, PTO-SCALAR-BIS, PTO-SCALAR-BSE, PTO-SCALAR-BWE, PTO-SCALAR-BWI, PTO-SCALAR-BWT, PTO-SCALAR-BXS, PTO-SCALAR-BXU, PTO-SCALAR-C-ADD, PTO-SCALAR-C-ADDI, PTO-SCALAR-C-AND, PTO-SCALAR-C-CMP-EQI, PTO-SCALAR-C-CMP-NEI, PTO-SCALAR-C-EBREAK, PTO-SCALAR-C-LDI, PTO-SCALAR-C-LWI, PTO-SCALAR-C-MOVI, PTO-SCALAR-C-MOVR, PTO-SCALAR-C-OR, PTO-SCALAR-C-SDI, PTO-SCALAR-C-SETC-EQ, PTO-SCALAR-C-SETC-NE, PTO-SCALAR-C-SETC-TGT, PTO-SCALAR-C-SETRET, PTO-SCALAR-C-SEXT-B, PTO-SCALAR-C-SEXT-H, PTO-SCALAR-C-SEXT-W, PTO-SCALAR-C-SLLI, PTO-SCALAR-C-SRLI, PTO-SCALAR-C-SSRGET, PTO-SCALAR-C-SUB, PTO-SCALAR-C-SWI, PTO-SCALAR-C-ZEXT-B, PTO-SCALAR-C-ZEXT-H, PTO-SCALAR-C-ZEXT-W, PTO-SCALAR-CASB, PTO-SCALAR-CASD, PTO-SCALAR-CASH, PTO-SCALAR-CASW, PTO-SCALAR-CLZ, PTO-SCALAR-CMP-AND, PTO-SCALAR-CMP-ANDI, PTO-SCALAR-CMP-EQ, PTO-SCALAR-CMP-EQI, PTO-SCALAR-CMP-GE, PTO-SCALAR-CMP-GEI, PTO-SCALAR-CMP-GEU, PTO-SCALAR-CMP-GEUI, PTO-SCALAR-CMP-LT, PTO-SCALAR-CMP-LTI, PTO-SCALAR-CMP-LTU, PTO-SCALAR-CMP-LTUI, PTO-SCALAR-CMP-NE, PTO-SCALAR-CMP-NEI, PTO-SCALAR-CMP-OR, PTO-SCALAR-CMP-ORI, PTO-SCALAR-CSEL, PTO-SCALAR-CTZ, PTO-SCALAR-DC-CISW, PTO-SCALAR-DC-CIVA, PTO-SCALAR-DC-CSW, PTO-SCALAR-DC-CVA, PTO-SCALAR-DC-IALL, PTO-SCALAR-DC-ISW, PTO-SCALAR-DC-IVA, PTO-SCALAR-DC-ZVA, PTO-SCALAR-DIV, PTO-SCALAR-DIVU, PTO-SCALAR-DIVUW, PTO-SCALAR-DIVW, PTO-SCALAR-DMA, PTO-SCALAR-EBREAK, PTO-SCALAR-FABS, PTO-SCALAR-FADD, PTO-SCALAR-FCVT, PTO-SCALAR-FCVTA, PTO-SCALAR-FCVTM, PTO-SCALAR-FCVTN, PTO-SCALAR-FCVTP, PTO-SCALAR-FCVTZ, PTO-SCALAR-FDIV, PTO-SCALAR-FENCE-D, PTO-SCALAR-FENCE-I, PTO-SCALAR-FEQ, PTO-SCALAR-FEQS, PTO-SCALAR-FEXP, PTO-SCALAR-FGE, PTO-SCALAR-FGES, PTO-SCALAR-FLT, PTO-SCALAR-FLTS, PTO-SCALAR-FMADD, PTO-SCALAR-FMAX, PTO-SCALAR-FMIN, PTO-SCALAR-FMSUB, PTO-SCALAR-FMUL, PTO-SCALAR-FNE, PTO-SCALAR-FNES, PTO-SCALAR-FNMADD, PTO-SCALAR-FNMSUB, PTO-SCALAR-FRECIP, PTO-SCALAR-FSQRT, PTO-SCALAR-FSUB, PTO-SCALAR-HL-ADDI, PTO-SCALAR-HL-ADDIW, PTO-SCALAR-HL-ADDTPC, PTO-SCALAR-HL-ANDI, PTO-SCALAR-HL-ANDIW, PTO-SCALAR-HL-BFI, PTO-SCALAR-HL-CASB, PTO-SCALAR-HL-CASD, PTO-SCALAR-HL-CASH, PTO-SCALAR-HL-CASW, PTO-SCALAR-HL-CCAT, PTO-SCALAR-HL-CCATW, PTO-SCALAR-HL-CMP-ANDI, PTO-SCALAR-HL-CMP-EQI, PTO-SCALAR-HL-CMP-GEI, PTO-SCALAR-HL-CMP-GEUI, PTO-SCALAR-HL-CMP-LTI, PTO-SCALAR-HL-CMP-LTUI, PTO-SCALAR-HL-CMP-NEI, PTO-SCALAR-HL-CMP-ORI, PTO-SCALAR-HL-DIV, PTO-SCALAR-HL-DIVU, PTO-SCALAR-HL-DIVUW, PTO-SCALAR-HL-DIVW, PTO-SCALAR-HL-LB-PCR, PTO-SCALAR-HL-LB-PO, PTO-SCALAR-HL-LB-PR, PTO-SCALAR-HL-LBI, PTO-SCALAR-HL-LBI-PO, PTO-SCALAR-HL-LBI-PR, PTO-SCALAR-HL-LBIP, PTO-SCALAR-HL-LBP, PTO-SCALAR-HL-LBU-PCR, PTO-SCALAR-HL-LBU-PO, PTO-SCALAR-HL-LBU-PR, PTO-SCALAR-HL-LBUI, PTO-SCALAR-HL-LBUI-PO, PTO-SCALAR-HL-LBUI-PR, PTO-SCALAR-HL-LBUIP, PTO-SCALAR-HL-LBUP, PTO-SCALAR-HL-LD-PCR, PTO-SCALAR-HL-LD-PO, PTO-SCALAR-HL-LD-PR, PTO-SCALAR-HL-LDI, PTO-SCALAR-HL-LDI-PO, PTO-SCALAR-HL-LDI-PR, PTO-SCALAR-HL-LDI-U, PTO-SCALAR-HL-LDI-UPO, PTO-SCALAR-HL-LDI-UPR, PTO-SCALAR-HL-LDIP, PTO-SCALAR-HL-LDIP-U, PTO-SCALAR-HL-LDP, PTO-SCALAR-HL-LH-PCR, PTO-SCALAR-HL-LH-PO, PTO-SCALAR-HL-LH-PR, PTO-SCALAR-HL-LHI, PTO-SCALAR-HL-LHI-PO, PTO-SCALAR-HL-LHI-PR, PTO-SCALAR-HL-LHI-U, PTO-SCALAR-HL-LHI-UPO, PTO-SCALAR-HL-LHI-UPR, PTO-SCALAR-HL-LHIP, PTO-SCALAR-HL-LHIP-U, PTO-SCALAR-HL-LHP, PTO-SCALAR-HL-LHU-PCR, PTO-SCALAR-HL-LHU-PO, PTO-SCALAR-HL-LHU-PR, PTO-SCALAR-HL-LHUI, PTO-SCALAR-HL-LHUI-PO, PTO-SCALAR-HL-LHUI-PR, PTO-SCALAR-HL-LHUI-U, PTO-SCALAR-HL-LHUI-UPO, PTO-SCALAR-HL-LHUI-UPR, PTO-SCALAR-HL-LHUIP, PTO-SCALAR-HL-LHUIP-U, PTO-SCALAR-HL-LHUP, PTO-SCALAR-HL-LIS, PTO-SCALAR-HL-LIU, PTO-SCALAR-HL-LUI, PTO-SCALAR-HL-LW-PCR, PTO-SCALAR-HL-LW-PO, PTO-SCALAR-HL-LW-PR, PTO-SCALAR-HL-LWI, PTO-SCALAR-HL-LWI-PO, PTO-SCALAR-HL-LWI-PR, PTO-SCALAR-HL-LWI-U, PTO-SCALAR-HL-LWI-UPO, PTO-SCALAR-HL-LWI-UPR, PTO-SCALAR-HL-LWIP, PTO-SCALAR-HL-LWIP-U, PTO-SCALAR-HL-LWP, PTO-SCALAR-HL-LWU-PCR, PTO-SCALAR-HL-LWU-PO, PTO-SCALAR-HL-LWU-PR, PTO-SCALAR-HL-LWUI, PTO-SCALAR-HL-LWUI-PO, PTO-SCALAR-HL-LWUI-PR, PTO-SCALAR-HL-LWUI-U, PTO-SCALAR-HL-LWUI-UPO, PTO-SCALAR-HL-LWUI-UPR, PTO-SCALAR-HL-LWUIP, PTO-SCALAR-HL-LWUIP-U, PTO-SCALAR-HL-LWUP, PTO-SCALAR-HL-MADD, PTO-SCALAR-HL-MADDW, PTO-SCALAR-HL-MIADD, PTO-SCALAR-HL-MISUB, PTO-SCALAR-HL-MUL, PTO-SCALAR-HL-MULU, PTO-SCALAR-HL-ORI, PTO-SCALAR-HL-ORIW, PTO-SCALAR-HL-PRF, PTO-SCALAR-HL-PRF-A, PTO-SCALAR-HL-PRFI-U, PTO-SCALAR-HL-PRFI-UA, PTO-SCALAR-HL-REM, PTO-SCALAR-HL-REMU, PTO-SCALAR-HL-REMUW, PTO-SCALAR-HL-REMW, PTO-SCALAR-HL-SB-PCR, PTO-SCALAR-HL-SB-PO, PTO-SCALAR-HL-SB-PR, PTO-SCALAR-HL-SBI, PTO-SCALAR-HL-SBI-PO, PTO-SCALAR-HL-SBI-PR, PTO-SCALAR-HL-SBIP, PTO-SCALAR-HL-SBP, PTO-SCALAR-HL-SD-PCR, PTO-SCALAR-HL-SD-PO, PTO-SCALAR-HL-SD-PR, PTO-SCALAR-HL-SD-UPO, PTO-SCALAR-HL-SD-UPR, PTO-SCALAR-HL-SDI, PTO-SCALAR-HL-SDI-PO, PTO-SCALAR-HL-SDI-PR, PTO-SCALAR-HL-SDI-U, PTO-SCALAR-HL-SDI-UPO, PTO-SCALAR-HL-SDI-UPR, PTO-SCALAR-HL-SDIP, PTO-SCALAR-HL-SDIP-U, PTO-SCALAR-HL-SDP, PTO-SCALAR-HL-SDP-U, PTO-SCALAR-HL-SETC-ANDI, PTO-SCALAR-HL-SETC-EQI, PTO-SCALAR-HL-SETC-GEI, PTO-SCALAR-HL-SETC-GEUI, PTO-SCALAR-HL-SETC-LTI, PTO-SCALAR-HL-SETC-LTUI, PTO-SCALAR-HL-SETC-NEI, PTO-SCALAR-HL-SETC-ORI, PTO-SCALAR-HL-SETRET, PTO-SCALAR-HL-SH-PCR, PTO-SCALAR-HL-SH-PO, PTO-SCALAR-HL-SH-PR, PTO-SCALAR-HL-SH-UPO, PTO-SCALAR-HL-SH-UPR, PTO-SCALAR-HL-SHI, PTO-SCALAR-HL-SHI-PO, PTO-SCALAR-HL-SHI-PR, PTO-SCALAR-HL-SHI-U, PTO-SCALAR-HL-SHI-UPO, PTO-SCALAR-HL-SHI-UPR, PTO-SCALAR-HL-SHIP, PTO-SCALAR-HL-SHIP-U, PTO-SCALAR-HL-SHP, PTO-SCALAR-HL-SHP-U, PTO-SCALAR-HL-SSRGET, PTO-SCALAR-HL-SSRSET, PTO-SCALAR-HL-SUBI, PTO-SCALAR-HL-SUBIW, PTO-SCALAR-HL-SW-PCR, PTO-SCALAR-HL-SW-PO, PTO-SCALAR-HL-SW-PR, PTO-SCALAR-HL-SW-UPO, PTO-SCALAR-HL-SW-UPR, PTO-SCALAR-HL-SWI, PTO-SCALAR-HL-SWI-PO, PTO-SCALAR-HL-SWI-PR, PTO-SCALAR-HL-SWI-U, PTO-SCALAR-HL-SWI-UPO, PTO-SCALAR-HL-SWI-UPR, PTO-SCALAR-HL-SWIP, PTO-SCALAR-HL-SWIP-U, PTO-SCALAR-HL-SWP, PTO-SCALAR-HL-SWP-U, PTO-SCALAR-HL-XORI, PTO-SCALAR-HL-XORIW, PTO-SCALAR-IC-IALL, PTO-SCALAR-IC-IVA, PTO-SCALAR-J, PTO-SCALAR-JR, PTO-SCALAR-LB, PTO-SCALAR-LB-PCR, PTO-SCALAR-LBI, PTO-SCALAR-LBU, PTO-SCALAR-LBU-PCR, PTO-SCALAR-LBUI, PTO-SCALAR-LD, PTO-SCALAR-LD-ADD, PTO-SCALAR-LD-AND, PTO-SCALAR-LD-OR, PTO-SCALAR-LD-PCR, PTO-SCALAR-LD-SMAX, PTO-SCALAR-LD-SMIN, PTO-SCALAR-LD-UMAX, PTO-SCALAR-LD-UMIN, PTO-SCALAR-LD-XOR, PTO-SCALAR-LDI, PTO-SCALAR-LDI-U, PTO-SCALAR-LH, PTO-SCALAR-LH-PCR, PTO-SCALAR-LHI, PTO-SCALAR-LHI-U, PTO-SCALAR-LHU, PTO-SCALAR-LHU-PCR, PTO-SCALAR-LHUI, PTO-SCALAR-LHUI-U, PTO-SCALAR-LR-B, PTO-SCALAR-LR-D, PTO-SCALAR-LR-H, PTO-SCALAR-LR-W, PTO-SCALAR-LSRGET, PTO-SCALAR-LUI, PTO-SCALAR-LW, PTO-SCALAR-LW-ADD, PTO-SCALAR-LW-AND, PTO-SCALAR-LW-OR, PTO-SCALAR-LW-PCR, PTO-SCALAR-LW-SMAX, PTO-SCALAR-LW-SMIN, PTO-SCALAR-LW-UMAX, PTO-SCALAR-LW-UMIN, PTO-SCALAR-LW-XOR, PTO-SCALAR-LWI, PTO-SCALAR-LWI-U, PTO-SCALAR-LWU, PTO-SCALAR-LWU-PCR, PTO-SCALAR-LWUI, PTO-SCALAR-LWUI-U, PTO-SCALAR-MADD, PTO-SCALAR-MADDW, PTO-SCALAR-MAX, PTO-SCALAR-MAXU, PTO-SCALAR-MIN, PTO-SCALAR-MINU, PTO-SCALAR-MUL, PTO-SCALAR-MULU, PTO-SCALAR-MULUW, PTO-SCALAR-MULW, PTO-SCALAR-OR, PTO-SCALAR-ORI, PTO-SCALAR-ORIW, PTO-SCALAR-ORW, PTO-SCALAR-PRF, PTO-SCALAR-PRFI-U, PTO-SCALAR-REM, PTO-SCALAR-REMU, PTO-SCALAR-REMUW, PTO-SCALAR-REMW, PTO-SCALAR-REV, PTO-SCALAR-SB, PTO-SCALAR-SB-PCR, PTO-SCALAR-SBI, PTO-SCALAR-SC-B, PTO-SCALAR-SC-D, PTO-SCALAR-SC-H, PTO-SCALAR-SC-W, PTO-SCALAR-SCVTF, PTO-SCALAR-SD, PTO-SCALAR-SD-ADD, PTO-SCALAR-SD-AND, PTO-SCALAR-SD-OR, PTO-SCALAR-SD-PCR, PTO-SCALAR-SD-SMAX, PTO-SCALAR-SD-SMIN, PTO-SCALAR-SD-U, PTO-SCALAR-SD-UMAX, PTO-SCALAR-SD-UMIN, PTO-SCALAR-SD-XOR, PTO-SCALAR-SDI, PTO-SCALAR-SDI-U, PTO-SCALAR-SETC-AND, PTO-SCALAR-SETC-ANDI, PTO-SCALAR-SETC-EQ, PTO-SCALAR-SETC-EQI, PTO-SCALAR-SETC-GE, PTO-SCALAR-SETC-GEI, PTO-SCALAR-SETC-GEU, PTO-SCALAR-SETC-GEUI, PTO-SCALAR-SETC-LT, PTO-SCALAR-SETC-LTI, PTO-SCALAR-SETC-LTU, PTO-SCALAR-SETC-LTUI, PTO-SCALAR-SETC-NE, PTO-SCALAR-SETC-NEI, PTO-SCALAR-SETC-OR, PTO-SCALAR-SETC-ORI, PTO-SCALAR-SETC-TGT, PTO-SCALAR-SETRET, PTO-SCALAR-SH, PTO-SCALAR-SH-PCR, PTO-SCALAR-SH-U, PTO-SCALAR-SHI, PTO-SCALAR-SHI-U, PTO-SCALAR-SLL, PTO-SCALAR-SLLI, PTO-SCALAR-SLLIW, PTO-SCALAR-SLLW, PTO-SCALAR-SRA, PTO-SCALAR-SRAI, PTO-SCALAR-SRAIW, PTO-SCALAR-SRAW, PTO-SCALAR-SRL, PTO-SCALAR-SRLI, PTO-SCALAR-SRLIW, PTO-SCALAR-SRLW, PTO-SCALAR-SSRGET, PTO-SCALAR-SSRSET, PTO-SCALAR-SSRSWAP, PTO-SCALAR-SUB, PTO-SCALAR-SUBI, PTO-SCALAR-SUBIW, PTO-SCALAR-SUBW, PTO-SCALAR-SW, PTO-SCALAR-SW-ADD, PTO-SCALAR-SW-AND, PTO-SCALAR-SW-OR, PTO-SCALAR-SW-PCR, PTO-SCALAR-SW-SMAX, PTO-SCALAR-SW-SMIN, PTO-SCALAR-SW-U, PTO-SCALAR-SW-UMAX, PTO-SCALAR-SW-UMIN, PTO-SCALAR-SW-XOR, PTO-SCALAR-SWAPB, PTO-SCALAR-SWAPD, PTO-SCALAR-SWAPH, PTO-SCALAR-SWAPW, PTO-SCALAR-SWI, PTO-SCALAR-SWI-U, PTO-SCALAR-TLB-IA, PTO-SCALAR-TLB-IALL, PTO-SCALAR-TLB-IAV, PTO-SCALAR-TLB-IV, PTO-SCALAR-UCVTF, PTO-SCALAR-XOR, PTO-SCALAR-XORI, PTO-SCALAR-XORIW, PTO-SCALAR-XORW, PTO-TILE-GMOV, PTO-TILE-MGATHER, PTO-TILE-MGATHER-CAS, PTO-TILE-MGATHER-MASK, PTO-TILE-MSCATTER, PTO-TILE-MSCATTER-MASK, PTO-TILE-TABS, PTO-TILE-TADD, PTO-TILE-TADDS, PTO-TILE-TAND, PTO-TILE-TANDS, PTO-TILE-TCI, PTO-TILE-TCMP, PTO-TILE-TCMPS, PTO-TILE-TCOLARGMAX, PTO-TILE-TCOLARGMIN, PTO-TILE-TCOLEXPAND, PTO-TILE-TCOLEXPANDADD, PTO-TILE-TCOLEXPANDDIV, PTO-TILE-TCOLEXPANDEXPDIF, PTO-TILE-TCOLEXPANDMAX, PTO-TILE-TCOLEXPANDMIN, PTO-TILE-TCOLEXPANDMUL, PTO-TILE-TCOLEXPANDSUB, PTO-TILE-TCOLMAX, PTO-TILE-TCOLMIN, PTO-TILE-TCOLPROD, PTO-TILE-TCOLSUM, PTO-TILE-TCONCAT, PTO-TILE-TCVT, PTO-TILE-TDEQUANT, PTO-TILE-TDIV, PTO-TILE-TDIVS, PTO-TILE-TEXP, PTO-TILE-TEXPANDS, PTO-TILE-TEXTRACT, PTO-TILE-TFMA, PTO-TILE-TGATHER, PTO-TILE-TGEMV, PTO-TILE-TGEMV-ACC, PTO-TILE-TGEMV-BIAS, PTO-TILE-TGEMV-MX, PTO-TILE-TGEMV-MX-ACC, PTO-TILE-TGEMV-MX-BIAS, PTO-TILE-THISTOGRAM, PTO-TILE-TIMG2COL, PTO-TILE-TINSERT, PTO-TILE-TLOAD, PTO-TILE-TLOG, PTO-TILE-TMATMUL, PTO-TILE-TMATMUL-ACC, PTO-TILE-TMATMUL-BIAS, PTO-TILE-TMATMUL-MX, PTO-TILE-TMATMUL-MX-ACC, PTO-TILE-TMATMUL-MX-BIAS, PTO-TILE-TMAX, PTO-TILE-TMAXS, PTO-TILE-TMIN, PTO-TILE-TMINS, PTO-TILE-TMOV, PTO-TILE-TMRGSORT, PTO-TILE-TMUL, PTO-TILE-TMULS, PTO-TILE-TNEG, PTO-TILE-TNOT, PTO-TILE-TOR, PTO-TILE-TORS, PTO-TILE-TPREFETCH, PTO-TILE-TQUANT, PTO-TILE-TRECIP, PTO-TILE-TRELU, PTO-TILE-TREM, PTO-TILE-TREMS, PTO-TILE-TROWARGMAX, PTO-TILE-TROWARGMIN, PTO-TILE-TROWEXPAND, PTO-TILE-TROWEXPANDADD, PTO-TILE-TROWEXPANDDIV, PTO-TILE-TROWEXPANDEXPDIF, PTO-TILE-TROWEXPANDMAX, PTO-TILE-TROWEXPANDMIN, PTO-TILE-TROWEXPANDMUL, PTO-TILE-TROWEXPANDSUB, PTO-TILE-TROWMAX, PTO-TILE-TROWMIN, PTO-TILE-TROWPROD, PTO-TILE-TROWSUM, PTO-TILE-TRSQRT, PTO-TILE-TSCATTER, PTO-TILE-TSEL, PTO-TILE-TSELS, PTO-TILE-TSHL, PTO-TILE-TSHLS, PTO-TILE-TSHR, PTO-TILE-TSHRS, PTO-TILE-TSORT, PTO-TILE-TSQRT, PTO-TILE-TSTORE, PTO-TILE-TSUB, PTO-TILE-TSUBS, PTO-TILE-TTRI, PTO-TILE-TXOR, PTO-TILE-TXORS
Affected NDF
PTO-ACRC-DECISION-BINDING-001, PTO-ACRE-IMPLICIT-STOP-001, PTO-ADD-DECISION-BINDING-001, PTO-ADDTPC-PAGE-001, PTO-AND-DECISION-BINDING-001, PTO-ARCH-COMMIT-EVENT-CONFORMANCE-001, PTO-ARCH-CONDITIONAL-BRANCH-RESERVATION-001, PTO-ARCH-ENCODING-OWNERSHIP-001, PTO-ARCH-STATE-CLOSURE-001, PTO-ARCH-TEPL-ALIAS-001, PTO-ARCH-TILE-EXECUTION-ENGINE-001, PTO-ARCH-TILE-INSTRUCTION-CLASS-001, PTO-B-CATR-CONTROL-001, PTO-B-DATR-FIELDS-001, PTO-B-DIM-WRITE-001, PTO-B-FPATR-MATRIX-POSTPROCESS-001, PTO-B-HINT-LIFECYCLE-001, PTO-B-IOR-BINDING-001, PTO-B-IOS-SHARED-STATE-001, PTO-B-IOT-STREAM-001, PTO-BCNT-DECISION-BINDING-001, PTO-BIC-DECISION-BINDING-001, PTO-BIS-DECISION-BINDING-001, PTO-BLOCK-ERCOV-RESERVED-001, PTO-BLOCK-ESAVE-RESERVED-001, PTO-BLOCK-MSET-FILL-001, PTO-BLOCK-XB-RESERVED-001, PTO-BSE-DECISION-BINDING-001, PTO-BSTART-CALL-DECISION-BINDING-001, PTO-BSTART-DECISION-BINDING-001, PTO-BSTART-FP-CONTROL-001, PTO-BSTART-GMOV-COLLECTIVE-001, PTO-BSTART-ICALL-DECISION-BINDING-001, PTO-BSTART-MGATHER-CAS-SCHEMA-001, PTO-BSTART-MGATHER-MASK-SCHEMA-001, PTO-BSTART-MGATHER-SCHEMA-001, PTO-BSTART-MSCATTER-MASK-SCHEMA-001, PTO-BSTART-MSCATTER-SCHEMA-001, PTO-BSTART-SFU-DECISION-BINDING-001, PTO-BSTART-STD-CONTROL-001, PTO-BSTART-SYS-CONTROL-001, PTO-BSTART-TEPL-DECISION-BINDING-001, PTO-BSTART-TGEMV-ACC-CONTRACT-001, PTO-BSTART-TGEMV-BIAS-CONTRACT-001, PTO-BSTART-TGEMV-CONTRACT-001, PTO-BSTART-TGEMVMX-ACC-CONTRACT-001, PTO-BSTART-TGEMVMX-BIAS-CONTRACT-001, PTO-BSTART-TGEMVMX-CONTRACT-001, PTO-BSTART-TLOAD-CUBE-001, PTO-BSTART-TLOAD-MEMORY-001, PTO-BSTART-TMATMUL-ACC-CONTRACT-001, PTO-BSTART-TMATMUL-BIAS-CONTRACT-001, PTO-BSTART-TMATMUL-CONTRACT-001, PTO-BSTART-TMATMULMX-ACC-CONTRACT-001, PTO-BSTART-TMATMULMX-BIAS-CONTRACT-001, PTO-BSTART-TMATMULMX-CONTRACT-001, PTO-BSTART-TMOV-SHARED-001, PTO-BSTART-TPREFETCH-MEMORY-001, PTO-BSTART-TSTORE-CUBE-001, PTO-BSTART-TSTORE-MEMORY-001, PTO-BSTART-VEC-DECISION-BINDING-001, PTO-BSTOP-DECISION-BINDING-001, PTO-BWE-DECISION-BINDING-001, PTO-BWI-DECISION-BINDING-001, PTO-BWT-DECISION-BINDING-001, PTO-BXS-DECISION-BINDING-001, PTO-BXU-DECISION-BINDING-001, PTO-C-BSTART-CONTROL-001, PTO-C-BSTART-FP-CONTROL-001, PTO-C-BSTART-STD-CONTROL-001, PTO-C-BSTART-SYS-CONTROL-001, PTO-C-BSTOP-DECISION-BINDING-001, PTO-C-CMP-EQI-DECISION-BINDING-001, PTO-C-CMP-NEI-DECISION-BINDING-001, PTO-C-EBREAK-CAUSE-001, PTO-C-SETC-EQ-CONDITIONAL-SETTER-001, PTO-C-SETC-NE-CONDITIONAL-SETTER-001, PTO-C-SETC-TGT-SNAPSHOT-001, PTO-C-SETRET-DECISION-BINDING-001, PTO-C-SSRGET-DIRECT-IDS-001, PTO-CLZ-DECISION-BINDING-001, PTO-CTZ-DECISION-BINDING-001, PTO-CUBE-CELL-TRANSPORT-001, PTO-EBREAK-DECISION-BINDING-001, PTO-FABS-DECISION-BINDING-001, PTO-FCVTA-DECISION-BINDING-001, PTO-FCVTM-DECISION-BINDING-001, PTO-FCVTN-DECISION-BINDING-001, PTO-FCVTP-DECISION-BINDING-001, PTO-FCVTZ-DECISION-BINDING-001, PTO-FENCE-D-DECISION-BINDING-001, PTO-FENCE-I-DECISION-BINDING-001, PTO-FENTRY-RESTARTABLE-FRAME-001, PTO-FEXIT-RESTARTABLE-FRAME-001, PTO-FMAX-DECISION-BINDING-001, PTO-FMIN-DECISION-BINDING-001, PTO-FNE-DECISION-BINDING-001, PTO-FNES-DECISION-BINDING-001, PTO-FRET-RA-RESTARTABLE-FRAME-001, PTO-FRET-STK-RESTARTABLE-FRAME-001, PTO-GMOV-CORE4-PEER-001, PTO-HL-ADDI-CONTRACT-001, PTO-HL-ADDIW-CONTRACT-001, PTO-HL-ADDTPC-PAGE-001, PTO-HL-ANDI-CONTRACT-001, PTO-HL-ANDIW-CONTRACT-001, PTO-HL-BFI-DECISION-BINDING-001, PTO-HL-CCAT-CONTRACT-001, PTO-HL-CCATW-CONTRACT-001, PTO-HL-DIV-DECISION-BINDING-001, PTO-HL-DIVU-DECISION-BINDING-001, PTO-HL-DIVUW-DECISION-BINDING-001, PTO-HL-DIVW-DECISION-BINDING-001, PTO-HL-LIS-DECISION-BINDING-001, PTO-HL-LUI-UPPER-HALF-001, PTO-HL-MADDW-WORD-HALVES-001, PTO-HL-ORI-CONTRACT-001, PTO-HL-ORIW-CONTRACT-001, PTO-HL-PRF-A-CACHE-MODEL-001, PTO-HL-PRF-CACHE-MODEL-001, PTO-HL-PRFI-U-CACHE-MODEL-001, PTO-HL-PRFI-UA-CACHE-MODEL-001, PTO-HL-QMT-GQM-001, PTO-HL-QPOP-GQM-001, PTO-HL-QPUSH-GQM-001, PTO-HL-REM-RESULT-ORDER-001, PTO-HL-REMU-RESULT-ORDER-001, PTO-HL-REMUW-RESULT-ORDER-001, PTO-HL-REMW-RESULT-ORDER-001, PTO-HL-SD-UPO-DECISION-BINDING-001, PTO-HL-SD-UPR-DECISION-BINDING-001, PTO-HL-SETC-ANDI-CONDITIONAL-SETTER-001, PTO-HL-SETC-EQI-CONDITIONAL-SETTER-001, PTO-HL-SETC-GEI-CONDITIONAL-SETTER-001, PTO-HL-SETC-GEUI-CONDITIONAL-SETTER-001, PTO-HL-SETC-LTI-CONDITIONAL-SETTER-001, PTO-HL-SETC-LTUI-CONDITIONAL-SETTER-001, PTO-HL-SETC-NEI-CONDITIONAL-SETTER-001, PTO-HL-SETC-ORI-CONDITIONAL-SETTER-001, PTO-HL-SETRET-DECISION-BINDING-001, PTO-HL-SH-UPO-DECISION-BINDING-001, PTO-HL-SH-UPR-DECISION-BINDING-001, PTO-HL-SSRGET-DECISION-BINDING-001, PTO-HL-SSRSET-DECISION-BINDING-001, PTO-HL-SUBI-CONTRACT-001, PTO-HL-SUBIW-CONTRACT-001, PTO-HL-SW-UPO-DECISION-BINDING-001, PTO-HL-SW-UPR-DECISION-BINDING-001, PTO-HL-XORI-CONTRACT-001, PTO-HL-XORIW-CONTRACT-001, PTO-J-DECISION-BINDING-001, PTO-JR-DECISION-BINDING-001, PTO-L-BSTOP-DECISION-BINDING-001, PTO-LSRGET-BARG-001, PTO-MCOPY-RESTART-001, PTO-MGATHER-BYTE-DISPLACEMENT-001, PTO-MGATHER-CAS-ATOMIC-001, PTO-MGATHER-CAS-PUBLICATION-001, PTO-MGATHER-MASK-PREDICATE-001, PTO-MGATHER-MASK-PUBLICATION-001, PTO-MGATHER-MASK-TYPE-002, PTO-MSCATTER-BYTE-DISPLACEMENT-001, PTO-MSCATTER-DUPLICATE-ORDER-001, PTO-MSCATTER-MASK-DUPLICATE-001, PTO-MSCATTER-MASK-PREDICATE-001, PTO-MSCATTER-MASK-TYPE-002, PTO-NUMERIC-FORMAT-DESCRIPTOR-001, PTO-OR-DECISION-BINDING-001, PTO-PRF-NONFAULTING-HINT-001, PTO-PRFI-U-NONFAULTING-HINT-001, PTO-RELEASE-VERIFICATION, PTO-REV-DECISION-BINDING-001, PTO-SCVTF-DECISION-BINDING-001, PTO-SD-U-ADR-CONTRACT-001, PTO-SD-XOR-ADR-CONTRACT-001, PTO-SDI-ADR-CONTRACT-001, PTO-SDI-U-ADR-CONTRACT-001, PTO-SETC-AND-CONDITIONAL-SETTER-001, PTO-SETC-ANDI-CONDITIONAL-SETTER-001, PTO-SETC-EQ-CONDITIONAL-SETTER-001, PTO-SETC-EQI-CONDITIONAL-SETTER-001, PTO-SETC-GE-CONDITIONAL-SETTER-001, PTO-SETC-GEI-CONDITIONAL-SETTER-001, PTO-SETC-GEU-CONDITIONAL-SETTER-001, PTO-SETC-GEUI-CONDITIONAL-SETTER-001, PTO-SETC-LT-CONDITIONAL-SETTER-001, PTO-SETC-LTI-CONDITIONAL-SETTER-001, PTO-SETC-LTU-CONDITIONAL-SETTER-001, PTO-SETC-LTUI-CONDITIONAL-SETTER-001, PTO-SETC-NE-CONDITIONAL-SETTER-001, PTO-SETC-NEI-CONDITIONAL-SETTER-001, PTO-SETC-OR-CONDITIONAL-SETTER-001, PTO-SETC-ORI-CONDITIONAL-SETTER-001, PTO-SETC-TGT-ADR-CONTRACT-001, PTO-SETRET-ADR-CONTRACT-001, PTO-SH-ADR-CONTRACT-001, PTO-SH-PCR-ADR-CONTRACT-001, PTO-SH-U-ADR-CONTRACT-001, PTO-SHI-ADR-CONTRACT-001, PTO-SHI-U-ADR-CONTRACT-001, PTO-SLL-ADR-CONTRACT-001, PTO-SLLI-ADR-CONTRACT-001, PTO-SLLIW-ADR-CONTRACT-001, PTO-SLLW-ADR-CONTRACT-001, PTO-SOURCE-HIERARCHY, PTO-SRA-ADR-CONTRACT-001, PTO-SRAI-ADR-CONTRACT-001, PTO-SRAIW-ADR-CONTRACT-001, PTO-SRAW-ADR-CONTRACT-001, PTO-SRL-ADR-CONTRACT-001, PTO-SRLI-ADR-CONTRACT-001, PTO-SRLIW-ADR-CONTRACT-001, PTO-SRLW-ADR-CONTRACT-001, PTO-SSRGET-ADR-CONTRACT-001, PTO-SSRSET-ADR-CONTRACT-001, PTO-SSRSWAP-ADR-CONTRACT-001, PTO-SUB-ADR-CONTRACT-001, PTO-SUBI-ADR-CONTRACT-001, PTO-SUBIW-ADR-CONTRACT-001, PTO-SUBW-ADR-CONTRACT-001, PTO-SW-ADD-ADR-CONTRACT-001, PTO-SW-ADR-CONTRACT-001, PTO-SW-AND-ADR-CONTRACT-001, PTO-SW-OR-ADR-CONTRACT-001, PTO-SW-PCR-ADR-CONTRACT-001, PTO-SW-SMAX-ADR-CONTRACT-001, PTO-SW-SMIN-ADR-CONTRACT-001, PTO-SW-U-ADR-CONTRACT-001, PTO-SW-UMAX-ADR-CONTRACT-001, PTO-SW-UMIN-ADR-CONTRACT-001, PTO-SW-XOR-ADR-CONTRACT-001, PTO-SWAPB-ADR-CONTRACT-001, PTO-SWAPD-ADR-CONTRACT-001, PTO-SWAPH-ADR-CONTRACT-001, PTO-SWAPW-ADR-CONTRACT-001, PTO-SWI-ADR-CONTRACT-001, PTO-SWI-U-ADR-CONTRACT-001, PTO-TABS-CONTRACT-001, PTO-TADD-CONTRACT-001, PTO-TADDS-CONTRACT-001, PTO-TAND-CONTRACT-001, PTO-TANDS-CONTRACT-001, PTO-TCI-CONTRACT-001, PTO-TCMP-CONTRACT-001, PTO-TCMPS-CONTRACT-001, PTO-TCOLARGMAX-CONTRACT-001, PTO-TCOLARGMIN-CONTRACT-001, PTO-TCOLEXPAND-CONTRACT-001, PTO-TCOLEXPANDADD-CONTRACT-001, PTO-TCOLEXPANDDIV-CONTRACT-001, PTO-TCOLEXPANDEXPDIF-CONTRACT-001, PTO-TCOLEXPANDMAX-CONTRACT-001, PTO-TCOLEXPANDMIN-CONTRACT-001, PTO-TCOLEXPANDMUL-CONTRACT-001, PTO-TCOLEXPANDSUB-CONTRACT-001, PTO-TCOLMAX-CONTRACT-001, PTO-TCOLMIN-CONTRACT-001, PTO-TCOLPROD-CONTRACT-001, PTO-TCOLSUM-CONTRACT-001, PTO-TCONCAT-CONTRACT-001, PTO-TCVT-CONTRACT-001, PTO-TDEQUANT-CONTRACT-001, PTO-TDIV-CONTRACT-001, PTO-TDIVS-CONTRACT-001, PTO-TEXP-CONTRACT-001, PTO-TEXPANDS-CONTRACT-001, PTO-TEXTRACT-CONTRACT-001, PTO-TFMA-CONTRACT-001, PTO-TGATHER-CONTRACT-001, PTO-TGEMV-ACC-CONTRACT-001, PTO-TGEMV-BIAS-CONTRACT-001, PTO-TGEMV-CONTRACT-001, PTO-TGEMV-MX-ACC-CONTRACT-001, PTO-TGEMV-MX-BIAS-CONTRACT-001, PTO-TGEMV-MX-CONTRACT-001, PTO-THISTOGRAM-CONTRACT-001, PTO-TILE-CAPACITY-PER-PE, PTO-TIMG2COL-CONTRACT-001, PTO-TINSERT-CONTRACT-001, PTO-TLB-IA-ADR-CONTRACT-001, PTO-TLB-IALL-ADR-CONTRACT-001, PTO-TLB-IAV-ADR-CONTRACT-001, PTO-TLB-IV-ADR-CONTRACT-001, PTO-TLOAD-CUBE-001, PTO-TLOAD-MEMORY-001, PTO-TLOG-CONTRACT-001, PTO-TMATMUL-ACC-CONTRACT-001, PTO-TMATMUL-BIAS-CONTRACT-001, PTO-TMATMUL-CONTRACT-001, PTO-TMATMUL-MX-ACC-CONTRACT-001, PTO-TMATMUL-MX-BIAS-CONTRACT-001, PTO-TMATMUL-MX-CONTRACT-001, PTO-TMAX-CONTRACT-001, PTO-TMAXS-CONTRACT-001, PTO-TMIN-CONTRACT-001, PTO-TMINS-CONTRACT-001, PTO-TMOV-CONTRACT-001, PTO-TMRGSORT-CONTRACT-001, PTO-TMUL-CONTRACT-001, PTO-TMULS-CONTRACT-001, PTO-TNEG-CONTRACT-001, PTO-TNOT-CONTRACT-001, PTO-TOR-CONTRACT-001, PTO-TORS-CONTRACT-001, PTO-TPREFETCH-FOOTPRINT-001, PTO-TQUANT-CONTRACT-001, PTO-TRECIP-CONTRACT-001, PTO-TRELU-CONTRACT-001, PTO-TREM-CONTRACT-001, PTO-TREMS-CONTRACT-001, PTO-TROWARGMAX-CONTRACT-001, PTO-TROWARGMIN-CONTRACT-001, PTO-TROWEXPAND-CONTRACT-001, PTO-TROWEXPANDADD-CONTRACT-001, PTO-TROWEXPANDDIV-CONTRACT-001, PTO-TROWEXPANDEXPDIF-CONTRACT-001, PTO-TROWEXPANDMAX-CONTRACT-001, PTO-TROWEXPANDMIN-CONTRACT-001, PTO-TROWEXPANDMUL-CONTRACT-001, PTO-TROWEXPANDSUB-CONTRACT-001, PTO-TROWMAX-CONTRACT-001, PTO-TROWMIN-CONTRACT-001, PTO-TROWPROD-CONTRACT-001, PTO-TROWSUM-CONTRACT-001, PTO-TRSQRT-CONTRACT-001, PTO-TSCATTER-CONTRACT-001, PTO-TSEL-CONTRACT-001, PTO-TSELS-CONTRACT-001, PTO-TSHL-CONTRACT-001, PTO-TSHLS-CONTRACT-001, PTO-TSHR-CONTRACT-001, PTO-TSHRS-CONTRACT-001, PTO-TSORT-CONTRACT-001, PTO-TSQRT-CONTRACT-001, PTO-TSTORE-CUBE-001, PTO-TSTORE-MEMORY-001, PTO-TSUB-CONTRACT-001, PTO-TSUBS-CONTRACT-001, PTO-TTRI-CONTRACT-001, PTO-TXOR-CONTRACT-001, PTO-TXORS-CONTRACT-001, PTO-UCVTF-DECISION-BINDING-001, PTO-XOR-ADR-CONTRACT-001, PTO-XORI-ADR-CONTRACT-001, PTO-XORIW-ADR-CONTRACT-001, PTO-XORW-ADR-CONTRACT-001
SHA-256
f18d13f735cfaf9f2803c754c5818f4af33d1cc42c489f0d9ce060b07bb3a196
Open exact decision source ↗ for ADR-0059

Unit metadata

Open 11 generated metadata fields

assembly: [ "hl.casd [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aq [SrcL], SrcR, SrcD, ->Rd", "hl.casd.rl [SrcL], SrcR, SrcD, ->Rd", "hl.casd.f [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aqrl [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aqf [SrcL], SrcR, SrcD, ->Rd", "hl.casd.rlf [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aqrlf [SrcL], SrcR, SrcD, ->Rd" ]
block: []
catalog_indices: [ 124 ]
catalog_records: [ { "asm": "hl.casd<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> [SrcL], SrcR, SrcD, ->{t, u, Rd}", "constraints": [], "encoding": [ { "index": 0, "mask": "0xf000707ff83f", "match": "0x3000600b000e", "width_bits": 48 } ], "encoding_kind": "HL48", "fields": [ { "name": "RegDst", "pieces": [ { "instruction_lsb": 23, "value_lsb": 0, "width": 5 } ], "signedness": "encoding-defined", "width": 5 }, { "name": "SrcD", "pieces": [ { "instruction_lsb": 6, "value_lsb": 0, "width": 5 } ], "signedness": "encoding-defined", "width": 5 }, { "name": "SrcL", "pieces": [ { "instruction_lsb": 31, "value_lsb": 0, "width": 5 } ], "signedness": "encoding-defined", "width": 5 }, { "name": "SrcR", "pieces": [ { "instruction_lsb": 36, "value_lsb": 0, "width": 5 } ], "signedness": "encoding-defined", "width": 5 }, { "name": "aq", "pieces": [ { "instruction_lsb": 42, "value_lsb": 0, "width": 1 } ], "signedness": "encoding-defined", "width": 1 }, { "name": "far", "pieces": [ { "instruction_lsb": 43, "value_lsb": 0, "width": 1 } ], "signedness": "encoding-defined", "width": 1 }, { "name": "rl", "pieces": [ { "instruction_lsb": 41, "value_lsb": 0, "width": 1 } ], "signedness": "encoding-defined", "width": 1 } ], "form_id": "hl_casd_48_fbb5c4256d30", "length_bits": 48, "mnemonic": "HL.CASD", "semantic_family": "AMO", "semantic_group": "AMO", "semantic_handler": "CompareAndSwap", "semantic_summary": "HL.CASD atomically compares and conditionally replaces one doubleword, then publishes the prior value.", "status": "accepted" } ]
classification: [ "amo" ]
contract: { "block_composition": [ "none" ], "canonical_assembly": [ "hl.casd [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aq [SrcL], SrcR, SrcD, ->Rd", "hl.casd.rl [SrcL], SrcR, SrcD, ->Rd", "hl.casd.f [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aqrl [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aqf [SrcL], SrcR, SrcD, ->Rd", "hl.casd.rlf [SrcL], SrcR, SrcD, ->Rd", "hl.casd.aqrlf [SrcL], SrcR, SrcD, ->Rd" ], "defaults": [ "SrcL, SrcR, SrcD, and RegDst are required Reg5 fields. Encoded source zero reads the architectural zero register; encoded destination zero discards the old value.", "aq=0 and rl=0 select relaxed ordering. aq=1 selects acquire, rl=1 selects release, and aq=1 with rl=1 selects acquire-release.", "far=0 selects the default flat-address route. far=1 is a profile routing hint; the reference profile preserves the same address and atomic result." ], "encoding_class": "standalone-encoded", "examples": [ "hl.casd [a0], a1, a2, ->a3", "hl.casd.aqrlf [t#1], u#1, a0, ->u" ], "exceptions": [ "The effective address must be aligned to 8 bytes. Alignment, read translation/permission, write translation/permission, and translated-address equality are checked before effects.", "On a fault, no destination, memory write, event, reservation update, or TPC advance occurs. Trap entry saves the original TPC and recovery restores it for full reissue.", "An undecodable fixed-bit pattern raises Fault_IllegalInstruction before effects. All explicit field values are assigned." ], "field_contracts": {}, "field_zero_meanings": { "RegDst": "Encoded zero discards the prior value.", "SrcL": "Encoded zero reads the architectural zero register as the address.", "SrcR": "Encoded zero supplies numeric zero as the expected value.", "SrcD": "Encoded zero supplies numeric zero as the desired value.", "aq": "Encoded zero disables acquire ordering.", "rl": "Encoded zero disables release ordering.", "far": "Encoded zero selects the default flat-address route." }, "legality": [ "All 32 SrcL, SrcR, and SrcD Reg5 encodings are assigned: 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4.", "All 32 RegDst encodings are assigned. Code 0 and codes 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write the named absolute GPR.", "All aq, rl, and far combinations are assigned.", "The effective address must be aligned to 8 bytes." ], "memory_effects": [ "After aligned read and write preflight identify the same translated location, atomically read one 8-byte doubleword and compare it with SrcR truncated to 8 bytes.", "On equality, store SrcD truncated to 8 bytes and set write_performed in the atomic event. On mismatch, preserve memory and emit an ordered atomic event with write_performed false.", "Only a successful overlapping write invalidates the local 64-byte-line reservation; mismatch and nonoverlap preserve it.", "The 64-bit old value is published unchanged." ], "operands": [ { "field": "SrcL", "role": "Reg5 atomic address source" }, { "field": "SrcR", "role": "Reg5 expected doubleword source" }, { "field": "SrcD", "role": "Reg5 desired doubleword source" }, { "field": "RegDst", "role": "Reg5 old-value destination" }, { "field": "aq", "role": "acquire ordering bit" }, { "field": "rl", "role": "release ordering bit" }, { "field": "far", "role": "flat-address routing hint" } ], "ordering": [ "aq=0,rl=0 records relaxed ordering; aq=1,rl=0 acquire; aq=0,rl=1 release; aq=1,rl=1 acquire-release for both match and mismatch.", "far changes only the route hint in the reference profile." ], "standalone_opcode": true, "state_effects": [ "Snapshot SrcL, SrcR, and SrcD before any memory or destination effect.", "Publish the prior value after every nonfaulting match or mismatch; publish no value on fault.", "The 64-bit old value is published unchanged.", "Successful execution advances TPC by 6 bytes. A fault saves and later restores the original TPC for full reissue." ] }
depends_on: [ "PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING" ]
id: PTO-SCALAR-HL-CASD
mnemonic: HL.CASD
summary: HL.CASD atomically compares and conditionally replaces one doubleword, then publishes the prior value.
surface: scalar

Open generated traceability record

{
  "classification": [
    "amo"
  ],
  "documentation": "docs/scalar/amo/HL.CASD.md",
  "id": "PTO-SCALAR-HL-CASD",
  "instruction_contract": {
    "artifact": "spec/evidence/instruction-contract-closure.json",
    "mnemonic": "HL.CASD",
    "ndf_clause": "PTO-INST-SCALAR-HL-CASD"
  },
  "mnemonic": "HL.CASD",
  "readiness_subjects": [
    "ADR-0020",
    "ADR-0030",
    "ADR-0059"
  ],
  "semantic_tests": [
    "PTO-AVS-SCALAR-HL-CASD-MATCH-001",
    "PTO-AVS-SCALAR-HL-CASD-MISMATCH-001",
    "PTO-AVS-SCALAR-HL-CASD-PRECISE-001"
  ],
  "source": "asl/scalar/amo/HL.CASD.asl",
  "surface": "scalar",
  "tests": [
    "PTO-AVS-SCALAR-HL-CASD-DECODE-001",
    "PTO-AVS-SCALAR-HL-CASD-MATCH-001",
    "PTO-AVS-SCALAR-HL-CASD-MISMATCH-001",
    "PTO-AVS-SCALAR-HL-CASD-PRECISE-001"
  ]
}

Sources and release identity

Show commit, paths, hashes, version, and canonical owners

Release: 0.58.5 · Release candidate
Commit: 7dc8b7e5b121d2b2499a2273bebff29e2cd86812
Original ASL: asl/scalar/amo/HL.CASD.asl
ASL SHA-256: 7820c5f37074f3b382addeb3dd040d1072967e97f3364c1ab90315807356c480
Generated documentation: docs/scalar/amo/HL.CASD.md · embedded in this page
Documentation SHA-256: c018d857927b1c2143b63e363e147bea041f3f872ae709c357dff854237eaff2

Exact owners

ASL PTO-SCALAR-HL-CASD asl/scalar/amo/HL.CASD.asl
NDF PTO-INST-SCALAR-HL-CASD asl/scalar/amo/HL.CASD.asl

Assembly syntax

Assembler symbols

Encoding

Instruction contract

Operands and parameters

Constraints, checks, and faults

State reads, writes, and result

Decode source binding

Operation source binding

Behavior

What HL.CASD does

Atomic mechanism

Inputs and result

Effects and ordering

Legality and precise faults

illustrative example

Evidence index

Decision record

Decision record

Decision record

Unit metadata

Sources and release identity

Exact owners