SC.D

SC.D conditionally stores one doubleword when the local 64-byte-line reservation matches.

PTO-SCALAR-SC-D

Assembly syntax

sc.d SrcL, [SrcR], ->Rdsc.d.aq SrcL, [SrcR], ->Rdsc.d.rl SrcL, [SrcR], ->Rdsc.d.f SrcL, [SrcR], ->Rdsc.d.aqrl SrcL, [SrcR], ->Rdsc.d.aqf SrcL, [SrcR], ->Rdsc.d.rlf SrcL, [SrcR], ->Rdsc.d.aqrlf SrcL, [SrcR], ->Rd

Assembler symbols

Assembly fields and architectural roles
Field	Bits	Signedness	Architectural role	Encoded zero
`RegDst`	5	encoding-defined	Reg5 success-status destination	Encoded zero discards the success status.
`SrcL`	5	encoding-defined	Reg5 doubleword store-value source	Encoded zero supplies numeric zero as the store value.
`SrcR`	5	encoding-defined	Reg5 store-address source	Encoded zero reads the architectural zero register as the store address.
`aq`	1	encoding-defined	acquire ordering bit	Encoded zero disables acquire ordering.
`far`	1	encoding-defined	flat-address routing hint	Encoded zero selects the default flat-address route.
`rl`	1	encoding-defined	release ordering bit	Encoded zero disables release ordering.

Encoding

Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.

Encoding fields as an accessible table

Generated encoding fields for sc.d<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> SrcL, [SrcR], {->t, ->u, ->Rd}
Decoded item	Bit range	Value
Constant	31:28	4'b0011
far	27	variable
aq	26	variable
rl	25	variable
SrcR	24:20	variable
SrcL	19:15	variable
Constant	14:12	3'b001
RegDst	11:7	variable
Constant	6:0	7'b0001011

WaveJSON source

{
  "reg": [
    {
      "bits": 7,
      "name": "7'b0001011"
    },
    {
      "bits": 5,
      "name": "RegDst"
    },
    {
      "bits": 3,
      "name": "3'b001"
    },
    {
      "bits": 5,
      "name": "SrcL"
    },
    {
      "bits": 5,
      "name": "SrcR"
    },
    {
      "bits": 1,
      "name": "rl"
    },
    {
      "bits": 1,
      "name": "aq"
    },
    {
      "bits": 1,
      "name": "far"
    },
    {
      "bits": 4,
      "name": "4'b0011"
    }
  ],
  "config": {
    "bits": 32,
    "fontsize": 13,
    "hspace": 900,
    "lanes": 1,
    "offset": 0
  }
}

sc.d<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> SrcL, [SrcR], {->t, ->u, ->Rd}

Instruction contract

Operands and parameters

SrcL: Reg5 doubleword store-value source
SrcR: Reg5 store-address source
RegDst: Reg5 success-status destination
aq: acquire ordering bit
rl: release ordering bit
far: flat-address routing hint

Constraints, checks, and faults

All 32 SrcL and SrcR Reg5 encodings are assigned: 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4.
All 32 RegDst encodings are assigned. Code 0 and codes 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write the named absolute GPR.
All aq, rl, and far combinations are assigned. Reservation match is based only on the containing 64-byte line; LR byte address and width do not narrow it.
A line-matched effective address must be aligned to 8 bytes.
A line-matched effective address must be aligned to 8 bytes. On a line-matched attempt, alignment, translation, and write permission are checked after reservation clear and before memory or destination effects.
A line-matched access fault reports the original address, emits no event, preserves memory and destination, and enters the ordinary trap envelope. Recovery restores the original TPC.
A reservation miss is probe-free even for a misaligned or inaccessible address and therefore does not raise a data-access fault.
An undecodable fixed-bit pattern raises Fault_IllegalInstruction before effects. All explicit field values are assigned.

State reads, writes, and result

Snapshot SrcL and SrcR before reservation, memory, or destination effects, including repeated GPR and same-queue aliases.
Publish status zero after a nonfaulting matching store and status one after a reservation miss. A line-matched fault publishes no status.
Clear the local reservation for success, miss, and line-matched fault before any possible trap.
Successful or miss completion advances TPC by four bytes. A line-matched fault saves the original TPC; recovery restores it, and reissue without a new LR completes as a miss.
A matching reservation is cleared before access preflight. After successful preflight, store SrcL all 64 bits as one 8-byte little-endian doubleword, emit one ordered store event, and publish status zero.
A missing or different-line reservation is cleared and publishes status one without alignment, translation, permission, bounded-memory probe, memory event, or memory access.
The reservation is cleared by every attempt. A line-matched access fault leaves memory and destination unchanged; after recovery, reissue without a new LR is a probe-free miss.
aq=0,rl=0 records relaxed ordering; aq=1,rl=0 acquire; aq=0,rl=1 release; aq=1,rl=1 acquire-release on a successful store.
A reservation miss emits no memory event. far changes only the route hint in the reference profile.

ASL pseudocode

This Operation comes directly from the instruction owner; the page does not rewrite its behavior.

Decode source binding

4readonly func InstructionContractOperation_SC_D() => ScalarOperation5begin6    return ScalarOperation_SC_D;7end;

Operation source binding

10readonly func InstructionContractHandler_SC_D() => ScalarSemanticHandler11begin12    return ScalarHandler_StoreConditional;13end;14
15pure func InstructionContractStoreSizeBytes_SC_D()16    => integer {1,2,4,8}17begin18    return 8;19end;20
21pure func InstructionContractReservationGranuleBytes_SC_D()22    => integer {1..262144}23begin24    return PTO_RESERVATION_GRANULE_BYTES;25end;26
27pure func InstructionContractSuccessStatus_SC_D() => Word28begin29    return Zeros{PTO_XLEN};30end;31
32pure func InstructionContractMissStatus_SC_D() => Word33begin34    return Zeros{PTO_XLEN} + 1;35end;36
37pure func InstructionContractMissIsProbeFree_SC_D()38    => boolean39begin40    return TRUE;41end;

View the complete ASL owner

1// PTO-INSTRUCTION: {"assembly":["sc.d SrcL, [SrcR], ->Rd","sc.d.aq SrcL, [SrcR], ->Rd","sc.d.rl SrcL, [SrcR], ->Rd","sc.d.f SrcL, [SrcR], ->Rd","sc.d.aqrl SrcL, [SrcR], ->Rd","sc.d.aqf SrcL, [SrcR], ->Rd","sc.d.rlf SrcL, [SrcR], ->Rd","sc.d.aqrlf SrcL, [SrcR], ->Rd"],"block":[],"catalog_indices":[381],"catalog_records":[{"asm":"sc.d<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> SrcL, [SrcR], {->t, ->u, ->Rd}","constraints":[],"encoding":[{"index":0,"mask":"0xf000707f","match":"0x3000100b","width_bits":32}],"encoding_kind":"L32","fields":[{"name":"RegDst","pieces":[{"instruction_lsb":7,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcL","pieces":[{"instruction_lsb":15,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"SrcR","pieces":[{"instruction_lsb":20,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"aq","pieces":[{"instruction_lsb":26,"value_lsb":0,"width":1}],"signedness":"encoding-defined","width":1},{"name":"far","pieces":[{"instruction_lsb":27,"value_lsb":0,"width":1}],"signedness":"encoding-defined","width":1},{"name":"rl","pieces":[{"instruction_lsb":25,"value_lsb":0,"width":1}],"signedness":"encoding-defined","width":1}],"form_id":"sc_d_32_2e714149031c","length_bits":32,"mnemonic":"SC.D","semantic_family":"AMO","semantic_group":"AMO","semantic_handler":"StoreConditional","semantic_summary":"SC.D conditionally stores one doubleword when the local 64-byte-line reservation matches.","status":"accepted"}],"classification":["amo"],"contract":{"block_composition":["none"],"canonical_assembly":["sc.d SrcL, [SrcR], ->Rd","sc.d.aq SrcL, [SrcR], ->Rd","sc.d.rl SrcL, [SrcR], ->Rd","sc.d.f SrcL, [SrcR], ->Rd","sc.d.aqrl SrcL, [SrcR], ->Rd","sc.d.aqf SrcL, [SrcR], ->Rd","sc.d.rlf SrcL, [SrcR], ->Rd","sc.d.aqrlf SrcL, [SrcR], ->Rd"],"defaults":["SrcL, SrcR, and RegDst are required Reg5 fields. Encoded source zero reads the architectural zero register; encoded destination zero discards the status.","aq=0 and rl=0 select relaxed ordering. aq=1 selects acquire, rl=1 selects release, and aq=1 with rl=1 selects acquire-release.","far=0 selects the default flat-address route. far=1 is a profile routing hint; the reference profile preserves the same address and reservation comparison."],"encoding_class":"standalone-encoded","examples":["sc.d a0, [a1], ->a2","sc.d.aqrl t#1, [u#1], ->u","sc.d.f zero, [sp], ->t"],"exceptions":["A line-matched effective address must be aligned to 8 bytes. On a line-matched attempt, alignment, translation, and write permission are checked after reservation clear and before memory or destination effects.","A line-matched access fault reports the original address, emits no event, preserves memory and destination, and enters the ordinary trap envelope. Recovery restores the original TPC.","A reservation miss is probe-free even for a misaligned or inaccessible address and therefore does not raise a data-access fault.","An undecodable fixed-bit pattern raises Fault_IllegalInstruction before effects. All explicit field values are assigned."],"field_contracts":{},"field_zero_meanings":{"RegDst":"Encoded zero discards the success status.","SrcL":"Encoded zero supplies numeric zero as the store value.","SrcR":"Encoded zero reads the architectural zero register as the store address.","aq":"Encoded zero disables acquire ordering.","far":"Encoded zero selects the default flat-address route.","rl":"Encoded zero disables release ordering."},"legality":["All 32 SrcL and SrcR Reg5 encodings are assigned: 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4.","All 32 RegDst encodings are assigned. Code 0 and codes 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write the named absolute GPR.","All aq, rl, and far combinations are assigned. Reservation match is based only on the containing 64-byte line; LR byte address and width do not narrow it.","A line-matched effective address must be aligned to 8 bytes."],"memory_effects":["A matching reservation is cleared before access preflight. After successful preflight, store SrcL all 64 bits as one 8-byte little-endian doubleword, emit one ordered store event, and publish status zero.","A missing or different-line reservation is cleared and publishes status one without alignment, translation, permission, bounded-memory probe, memory event, or memory access.","The reservation is cleared by every attempt. A line-matched access fault leaves memory and destination unchanged; after recovery, reissue without a new LR is a probe-free miss."],"operands":[{"field":"SrcL","role":"Reg5 doubleword store-value source"},{"field":"SrcR","role":"Reg5 store-address source"},{"field":"RegDst","role":"Reg5 success-status destination"},{"field":"aq","role":"acquire ordering bit"},{"field":"rl","role":"release ordering bit"},{"field":"far","role":"flat-address routing hint"}],"ordering":["aq=0,rl=0 records relaxed ordering; aq=1,rl=0 acquire; aq=0,rl=1 release; aq=1,rl=1 acquire-release on a successful store.","A reservation miss emits no memory event. far changes only the route hint in the reference profile."],"standalone_opcode":true,"state_effects":["Snapshot SrcL and SrcR before reservation, memory, or destination effects, including repeated GPR and same-queue aliases.","Publish status zero after a nonfaulting matching store and status one after a reservation miss. A line-matched fault publishes no status.","Clear the local reservation for success, miss, and line-matched fault before any possible trap.","Successful or miss completion advances TPC by four bytes. A line-matched fault saves the original TPC; recovery restores it, and reissue without a new LR completes as a miss."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-SCALAR-SC-D","mnemonic":"SC.D","summary":"SC.D conditionally stores one doubleword when the local 64-byte-line reservation matches.","surface":"scalar"}2// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}3// DOC-BEGIN: decode4readonly func InstructionContractOperation_SC_D() => ScalarOperation5begin6    return ScalarOperation_SC_D;7end;8// DOC-END: decode9// DOC-BEGIN: operation10readonly func InstructionContractHandler_SC_D() => ScalarSemanticHandler11begin12    return ScalarHandler_StoreConditional;13end;14
15pure func InstructionContractStoreSizeBytes_SC_D()16    => integer {1,2,4,8}17begin18    return 8;19end;20
21pure func InstructionContractReservationGranuleBytes_SC_D()22    => integer {1..262144}23begin24    return PTO_RESERVATION_GRANULE_BYTES;25end;26
27pure func InstructionContractSuccessStatus_SC_D() => Word28begin29    return Zeros{PTO_XLEN};30end;31
32pure func InstructionContractMissStatus_SC_D() => Word33begin34    return Zeros{PTO_XLEN} + 1;35end;36
37pure func InstructionContractMissIsProbeFree_SC_D()38    => boolean39begin40    return TRUE;41end;42// DOC-END: operation43

Behavior

purpose

What SC.D does

SC.D conditionally stores one doubleword when the local 64-byte-line reservation matches and publishes status zero for success or one for a miss.

mechanism

Atomic mechanism

The ASL DOC contract selects ScalarHandler_StoreConditional with an access width of 8 bytes.

Every attempt clears the reservation. A reservation miss is probe-free, while a matching attempt performs write preflight before memory or destination effects.

inputs outputs

Inputs and result

SrcL carries the Reg5 doubleword store-value source; SrcR carries the Reg5 store-address source; RegDst carries the Reg5 success-status destination; aq carries the acquire ordering bit; rl carries the release ordering bit; far carries the flat-address routing hint.

aq and rl select relaxed, acquire, release, or acquire-release ordering; far is a profile routing hint and does not change the architectural result in the reference profile.

effects

Effects and ordering

A matching nonfaulting attempt stores the low-width source and emits one ordered store event; a miss leaves memory untouched and emits no event.

Success, miss, and line-matched fault all clear the reservation; success or miss advances TPC by 4 bytes.

constraints

Legality and precise faults

The effective address must be aligned to 8 bytes. Alignment, translation, and permission checks precede architectural effects.

A reservation miss is probe-free. A line-matched fault clears the reservation but publishes no status, event, memory update, or TPC advance; recovery reissue misses without a new LR.

example

illustrative example

This example only shows one accepted spelling; the generated contract below remains authoritative.

For a first reading, use sc.d SrcL, [SrcR], ->Rd and then vary only the ordering or route modifiers described above.

NDF clauses

Bodies come from owning ASL. Dragging or buttons change only this page-session view order.

No NDF clause is attached to this unit.

Evidence index

12 matching entries

Executable evidence4

canonical SC.D catalog and ASL contract remain aligned
1. surfaceSCALAR
2. ownerSC.D
3. categoryDECODE-POSITIVE
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-SC-D-DECODE-001
Path
tests/asl/scalar/amo/SC.D/scalar-decode-sc-d-canonical-001.asl
Kind / role
decode-positive
Requirements
PTO-INST-SCALAR-SC-D
Pass condition
all canonical decode and contract assertions hold
SHA-256
24867cec3ae3602051fd3bcc7af65c7f382528914aabd894d9d0eae82a2d7133
Open exact source ↗ for PTO-AVS-SCALAR-SC-D-DECODE-001
SC.D reservation miss is probe-free and pushes status one to U
1. surfaceSCALAR
2. ownerSC.D
3. categoryBOUNDARY
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-SC-D-MISS-001
Path
tests/asl/scalar/amo/SC.D/scalar-bound-sc-d-miss-001.asl
Kind / role
boundary
Requirements
PTO-INST-SCALAR-SC-D
Pass condition
inaccessible address does not fault or access memory and returns one while clearing the reservation
SHA-256
1e11ce0e96d98a45a2601cf3339eb744e33c4bc70c804503f221b3c9010709cf
Open exact source ↗ for PTO-AVS-SCALAR-SC-D-MISS-001
SC.D line-matched access fault clears the reservation without publishing status
1. surfaceSCALAR
2. ownerSC.D
3. categoryFAULT
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-SC-D-PRECISE-001
Path
tests/asl/scalar/amo/SC.D/scalar-fault-sc-d-precise-001.asl
Kind / role
fault
Requirements
PTO-INST-SCALAR-SC-D
Pass condition
trap, memory, destination, event, reservation clear, and recovery match the SC.D contract
SHA-256
2405a7c8d0fe53489a3a9ea98a68f23ca5e925357ee601ad3a5be0144937ed17
Open exact source ↗ for PTO-AVS-SCALAR-SC-D-PRECISE-001
SC.D succeeds for a same-line reservation independent of LR address and width
1. surfaceSCALAR
2. ownerSC.D
3. categoryEXECUTION
4. case001
Show exact test source
Sources and references
Complete stable ID
PTO-AVS-SCALAR-SC-D-SUCCESS-001
Path
tests/asl/scalar/amo/SC.D/scalar-exec-sc-d-success-001.asl
Kind / role
execution
Requirements
PTO-INST-SCALAR-SC-D
Pass condition
truncated store, zero status, event, reservation clear, ordering, and TPC match the SC.D contract
SHA-256
7d0e5d395e748167c3cdb2023748198a81f0ae0a346dbc8260a47dd1a8900feb
Open exact source ↗ for PTO-AVS-SCALAR-SC-D-SUCCESS-001

Commit-scoped evidence5

spec/evidence/release-traceability-readiness.json · closedPTO-EVIDENCE-RELEASE-TRACEABILITY
Sources and references
Complete stable ID
PTO-EVIDENCE-RELEASE-TRACEABILITY
Path
spec/evidence/release-traceability-readiness.json
Kind / role
ASL/NDF/documentation/AVS traceability
SHA-256
c7327021d39dc67ac5564bc55073b3870a397d79ac8d9648284d56e33bc14a3e
Open exact source ↗ for PTO-EVIDENCE-RELEASE-TRACEABILITY
spec/evidence/instruction-contract-closure.json · closedPTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSURE
Sources and references
Complete stable ID
PTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSURE
Path
spec/evidence/instruction-contract-closure.json
Kind / role
mnemonic and encoding contract closure
SHA-256
3ef2bb62421c79dff8fa77a1c7983923b523244b8090812883ef81286ca8106a
Open exact source ↗ for PTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSURE
spec/evidence/architecture-readiness.json · openPTO-EVIDENCE-ARCHITECTURE-READINESS
Sources and references
Complete stable ID
PTO-EVIDENCE-ARCHITECTURE-READINESS
Path
spec/evidence/architecture-readiness.json
Kind / role
architecture maturity and blockers
SHA-256
4b0b85199101251bea744e0f3591cc31906909dc80d5ab651c417a936036a004
Open exact source ↗ for PTO-EVIDENCE-ARCHITECTURE-READINESS
spec/evidence/release-gate-readiness.json · ready-for-exact-head-verificationPTO-EVIDENCE-RELEASE-GATE-READINESS
Sources and references
Complete stable ID
PTO-EVIDENCE-RELEASE-GATE-READINESS
Path
spec/evidence/release-gate-readiness.json
Kind / role
exact-head gate readiness
SHA-256
a0f4d2b6920c08981ea55fd8ef820708a40d4feb5402c5150e8e9ab532d84ce0
Open exact source ↗ for PTO-EVIDENCE-RELEASE-GATE-READINESS
spec/release-manifest.json · draftPTO-EVIDENCE-RELEASE-MANIFEST
Sources and references
Complete stable ID
PTO-EVIDENCE-RELEASE-MANIFEST
Path
spec/release-manifest.json
Kind / role
release content and encoding fingerprints
SHA-256
1a64c109ed7a90351c41e2a418b3c0ebaf8ad975838986d2101385186b85c0d8
Open exact source ↗ for PTO-EVIDENCE-RELEASE-MANIFEST

Decision history3

Production memory events and atomic corners · accepted
1. decision recordADR
2. case0020
Decision record
Loading ADR-0020…
Sources and references
Complete stable ID
ADR-0020
Path
docs/status/decisions/0020-production-memory-events-and-atomic-corners.md
Affected units
PTO-ARCH-MEMORY-MODEL-ADDRESS-SPACE, PTO-ARCH-MEMORY-MODEL-ATOMICITY, PTO-ARCH-MEMORY-MODEL-FAULT-PRECISION, PTO-ARCH-MEMORY-MODEL-GLOBAL-MEMORY-ACCESS, PTO-ARCH-MEMORY-MODEL-MEMORY-EVENTS, PTO-ARCH-MEMORY-MODEL-ORDERING, PTO-BLOCK-BSTART-GMOV, PTO-BLOCK-BSTART-MGATHER, PTO-BLOCK-BSTART-MGATHER-CAS, PTO-BLOCK-BSTART-MGATHER-MASK, PTO-BLOCK-BSTART-MSCATTER, PTO-BLOCK-BSTART-MSCATTER-MASK, PTO-BLOCK-BSTART-TLOAD, PTO-BLOCK-BSTART-TPREFETCH, PTO-BLOCK-BSTART-TSTORE, PTO-SCALAR-CASB, PTO-SCALAR-CASD, PTO-SCALAR-CASH, PTO-SCALAR-CASW, PTO-SCALAR-DMA, PTO-SCALAR-HL-CASB, PTO-SCALAR-HL-CASD, PTO-SCALAR-HL-CASH, PTO-SCALAR-HL-CASW, PTO-SCALAR-LD-ADD, PTO-SCALAR-LD-AND, PTO-SCALAR-LD-OR, PTO-SCALAR-LD-SMAX, PTO-SCALAR-LD-SMIN, PTO-SCALAR-LD-UMAX, PTO-SCALAR-LD-UMIN, PTO-SCALAR-LD-XOR, PTO-SCALAR-LR-B, PTO-SCALAR-LR-D, PTO-SCALAR-LR-H, PTO-SCALAR-LR-W, PTO-SCALAR-LW-ADD, PTO-SCALAR-LW-AND, PTO-SCALAR-LW-OR, PTO-SCALAR-LW-SMAX, PTO-SCALAR-LW-SMIN, PTO-SCALAR-LW-UMAX, PTO-SCALAR-LW-UMIN, PTO-SCALAR-LW-XOR, PTO-SCALAR-SC-B, PTO-SCALAR-SC-D, PTO-SCALAR-SC-H, PTO-SCALAR-SC-W, PTO-SCALAR-SD-ADD, PTO-SCALAR-SD-AND, PTO-SCALAR-SD-OR, PTO-SCALAR-SD-SMAX, PTO-SCALAR-SD-SMIN, PTO-SCALAR-SD-UMAX, PTO-SCALAR-SD-UMIN, PTO-SCALAR-SD-XOR, PTO-SCALAR-SW-ADD, PTO-SCALAR-SW-AND, PTO-SCALAR-SW-OR, PTO-SCALAR-SW-SMAX, PTO-SCALAR-SW-SMIN, PTO-SCALAR-SW-UMAX, PTO-SCALAR-SW-UMIN, PTO-SCALAR-SW-XOR, PTO-SCALAR-SWAPB, PTO-SCALAR-SWAPD, PTO-SCALAR-SWAPH, PTO-SCALAR-SWAPW, PTO-TILE-GMOV, PTO-TILE-MGATHER, PTO-TILE-MGATHER-CAS, PTO-TILE-MGATHER-MASK, PTO-TILE-MSCATTER, PTO-TILE-MSCATTER-MASK, PTO-TILE-TLOAD, PTO-TILE-TMOV, PTO-TILE-TPREFETCH, PTO-TILE-TSTORE
Affected NDF
PTO-ARCH-GM-ACCESS-001, PTO-BSTART-GMOV-COLLECTIVE-001, PTO-BSTART-MGATHER-CAS-SCHEMA-001, PTO-BSTART-MGATHER-MASK-SCHEMA-001, PTO-BSTART-MGATHER-SCHEMA-001, PTO-BSTART-MSCATTER-MASK-SCHEMA-001, PTO-BSTART-MSCATTER-SCHEMA-001, PTO-BSTART-TLOAD-CUBE-001, PTO-BSTART-TLOAD-MEMORY-001, PTO-BSTART-TPREFETCH-MEMORY-001, PTO-BSTART-TSTORE-CUBE-001, PTO-BSTART-TSTORE-MEMORY-001, PTO-GMOV-CORE4-PEER-001, PTO-MGATHER-BYTE-DISPLACEMENT-001, PTO-MGATHER-CAS-ATOMIC-001, PTO-MGATHER-CAS-PUBLICATION-001, PTO-MGATHER-MASK-PREDICATE-001, PTO-MGATHER-MASK-PUBLICATION-001, PTO-MGATHER-MASK-TYPE-002, PTO-MSCATTER-BYTE-DISPLACEMENT-001, PTO-MSCATTER-DUPLICATE-ORDER-001, PTO-MSCATTER-MASK-DUPLICATE-001, PTO-MSCATTER-MASK-PREDICATE-001, PTO-MSCATTER-MASK-TYPE-002, PTO-SD-XOR-ADR-CONTRACT-001, PTO-SW-ADD-ADR-CONTRACT-001, PTO-SW-AND-ADR-CONTRACT-001, PTO-SW-OR-ADR-CONTRACT-001, PTO-SW-SMAX-ADR-CONTRACT-001, PTO-SW-SMIN-ADR-CONTRACT-001, PTO-SW-UMAX-ADR-CONTRACT-001, PTO-SW-UMIN-ADR-CONTRACT-001, PTO-SW-XOR-ADR-CONTRACT-001, PTO-SWAPB-ADR-CONTRACT-001, PTO-SWAPD-ADR-CONTRACT-001, PTO-SWAPH-ADR-CONTRACT-001, PTO-SWAPW-ADR-CONTRACT-001, PTO-TLOAD-CUBE-001, PTO-TLOAD-MEMORY-001, PTO-TMOV-CONTRACT-001, PTO-TPREFETCH-FOOTPRINT-001, PTO-TSTORE-CUBE-001, PTO-TSTORE-MEMORY-001
SHA-256
215b18f05d0b53120949373fce6a5ce22f7ab534fb22df24743a9b2b4beb2dec
Open exact decision source ↗ for ADR-0020
Scalar AMO totality, reservations, and restart · accepted
1. decision recordADR
2. case0030
Decision record
Loading ADR-0030…
Sources and references
Complete stable ID
ADR-0030
Path
docs/status/decisions/0030-scalar-amo-totality-and-reservation.md
Affected units
PTO-SCALAR-CASB, PTO-SCALAR-CASD, PTO-SCALAR-CASH, PTO-SCALAR-CASW, PTO-SCALAR-DMA, PTO-SCALAR-HL-CASB, PTO-SCALAR-HL-CASD, PTO-SCALAR-HL-CASH, PTO-SCALAR-HL-CASW, PTO-SCALAR-LD-ADD, PTO-SCALAR-LD-AND, PTO-SCALAR-LD-OR, PTO-SCALAR-LD-SMAX, PTO-SCALAR-LD-SMIN, PTO-SCALAR-LD-UMAX, PTO-SCALAR-LD-UMIN, PTO-SCALAR-LD-XOR, PTO-SCALAR-LR-B, PTO-SCALAR-LR-D, PTO-SCALAR-LR-H, PTO-SCALAR-LR-W, PTO-SCALAR-LW-ADD, PTO-SCALAR-LW-AND, PTO-SCALAR-LW-OR, PTO-SCALAR-LW-SMAX, PTO-SCALAR-LW-SMIN, PTO-SCALAR-LW-UMAX, PTO-SCALAR-LW-UMIN, PTO-SCALAR-LW-XOR, PTO-SCALAR-SC-B, PTO-SCALAR-SC-D, PTO-SCALAR-SC-H, PTO-SCALAR-SC-W, PTO-SCALAR-SD-ADD, PTO-SCALAR-SD-AND, PTO-SCALAR-SD-OR, PTO-SCALAR-SD-SMAX, PTO-SCALAR-SD-SMIN, PTO-SCALAR-SD-UMAX, PTO-SCALAR-SD-UMIN, PTO-SCALAR-SD-XOR, PTO-SCALAR-SW-ADD, PTO-SCALAR-SW-AND, PTO-SCALAR-SW-OR, PTO-SCALAR-SW-SMAX, PTO-SCALAR-SW-SMIN, PTO-SCALAR-SW-UMAX, PTO-SCALAR-SW-UMIN, PTO-SCALAR-SW-XOR, PTO-SCALAR-SWAPB, PTO-SCALAR-SWAPD, PTO-SCALAR-SWAPH, PTO-SCALAR-SWAPW
Affected NDF
PTO-SD-XOR-ADR-CONTRACT-001, PTO-SW-ADD-ADR-CONTRACT-001, PTO-SW-AND-ADR-CONTRACT-001, PTO-SW-OR-ADR-CONTRACT-001, PTO-SW-SMAX-ADR-CONTRACT-001, PTO-SW-SMIN-ADR-CONTRACT-001, PTO-SW-UMAX-ADR-CONTRACT-001, PTO-SW-UMIN-ADR-CONTRACT-001, PTO-SW-XOR-ADR-CONTRACT-001, PTO-SWAPB-ADR-CONTRACT-001, PTO-SWAPD-ADR-CONTRACT-001, PTO-SWAPH-ADR-CONTRACT-001, PTO-SWAPW-ADR-CONTRACT-001
SHA-256
110bd32b3004a8383913ac6053cc7d0a1d0b8e03e3ef7c47d83292c94a6a17eb
Open exact decision source ↗ for ADR-0030
Mnemonic and Encoded-Field Contract Closure · accepted
1. decision recordADR
2. case0059
Decision record
Loading ADR-0059…
Sources and references
Complete stable ID
ADR-0059
Path
docs/status/decisions/0059-mnemonic-field-encoding-closure.md
Affected units
PTO-ARCH-DATA-TYPES-FORMAT-DESCRIPTOR, PTO-ARCH-OVERVIEW-ARCHITECTURE, PTO-ARCH-OVERVIEW-ENCODING-OWNERSHIP, PTO-ARCH-OVERVIEW-INSTRUCTION-CLASSIFICATION, PTO-BLOCK-B-CATR, PTO-BLOCK-B-DATR, PTO-BLOCK-B-DIM, PTO-BLOCK-B-FPATR, PTO-BLOCK-B-HINT, PTO-BLOCK-B-IOR, PTO-BLOCK-B-IOS, PTO-BLOCK-B-IOT, PTO-BLOCK-BSTART, PTO-BLOCK-BSTART-CALL, PTO-BLOCK-BSTART-FP, PTO-BLOCK-BSTART-GMOV, PTO-BLOCK-BSTART-ICALL, PTO-BLOCK-BSTART-MGATHER, PTO-BLOCK-BSTART-MGATHER-CAS, PTO-BLOCK-BSTART-MGATHER-MASK, PTO-BLOCK-BSTART-MSCATTER, PTO-BLOCK-BSTART-MSCATTER-MASK, PTO-BLOCK-BSTART-SFU, PTO-BLOCK-BSTART-STD, PTO-BLOCK-BSTART-SYS, PTO-BLOCK-BSTART-TEPL, PTO-BLOCK-BSTART-TGEMV, PTO-BLOCK-BSTART-TGEMV-ACC, PTO-BLOCK-BSTART-TGEMV-BIAS, PTO-BLOCK-BSTART-TGEMVMX, PTO-BLOCK-BSTART-TGEMVMX-ACC, PTO-BLOCK-BSTART-TGEMVMX-BIAS, PTO-BLOCK-BSTART-TLOAD, PTO-BLOCK-BSTART-TMATMUL, PTO-BLOCK-BSTART-TMATMUL-ACC, PTO-BLOCK-BSTART-TMATMUL-BIAS, PTO-BLOCK-BSTART-TMATMULMX, PTO-BLOCK-BSTART-TMATMULMX-ACC, PTO-BLOCK-BSTART-TMATMULMX-BIAS, PTO-BLOCK-BSTART-TMOV, PTO-BLOCK-BSTART-TPREFETCH, PTO-BLOCK-BSTART-TSTORE, PTO-BLOCK-BSTART-VEC, PTO-BLOCK-BSTOP, PTO-BLOCK-C-B-DIMI, PTO-BLOCK-C-BSTART, PTO-BLOCK-C-BSTART-FP, PTO-BLOCK-C-BSTART-STD, PTO-BLOCK-C-BSTART-SYS, PTO-BLOCK-C-BSTOP, PTO-BLOCK-ERCOV, PTO-BLOCK-ESAVE, PTO-BLOCK-FENTRY, PTO-BLOCK-FEXIT, PTO-BLOCK-FRET-RA, PTO-BLOCK-FRET-STK, PTO-BLOCK-HL-QMT, PTO-BLOCK-HL-QPOP, PTO-BLOCK-HL-QPUSH, PTO-BLOCK-L-BSTOP, PTO-BLOCK-MCOPY, PTO-BLOCK-MSET, PTO-BLOCK-XB, PTO-SCALAR-ACRC, PTO-SCALAR-ACRE, PTO-SCALAR-ADD, PTO-SCALAR-ADDI, PTO-SCALAR-ADDIW, PTO-SCALAR-ADDTPC, PTO-SCALAR-ADDW, PTO-SCALAR-AND, PTO-SCALAR-ANDI, PTO-SCALAR-ANDIW, PTO-SCALAR-ANDW, PTO-SCALAR-ASSERT, PTO-SCALAR-BC-IALL, PTO-SCALAR-BC-IVA, PTO-SCALAR-BCNT, PTO-SCALAR-BIC, PTO-SCALAR-BIS, PTO-SCALAR-BSE, PTO-SCALAR-BWE, PTO-SCALAR-BWI, PTO-SCALAR-BWT, PTO-SCALAR-BXS, PTO-SCALAR-BXU, PTO-SCALAR-C-ADD, PTO-SCALAR-C-ADDI, PTO-SCALAR-C-AND, PTO-SCALAR-C-CMP-EQI, PTO-SCALAR-C-CMP-NEI, PTO-SCALAR-C-EBREAK, PTO-SCALAR-C-LDI, PTO-SCALAR-C-LWI, PTO-SCALAR-C-MOVI, PTO-SCALAR-C-MOVR, PTO-SCALAR-C-OR, PTO-SCALAR-C-SDI, PTO-SCALAR-C-SETC-EQ, PTO-SCALAR-C-SETC-NE, PTO-SCALAR-C-SETC-TGT, PTO-SCALAR-C-SETRET, PTO-SCALAR-C-SEXT-B, PTO-SCALAR-C-SEXT-H, PTO-SCALAR-C-SEXT-W, PTO-SCALAR-C-SLLI, PTO-SCALAR-C-SRLI, PTO-SCALAR-C-SSRGET, PTO-SCALAR-C-SUB, PTO-SCALAR-C-SWI, PTO-SCALAR-C-ZEXT-B, PTO-SCALAR-C-ZEXT-H, PTO-SCALAR-C-ZEXT-W, PTO-SCALAR-CASB, PTO-SCALAR-CASD, PTO-SCALAR-CASH, PTO-SCALAR-CASW, PTO-SCALAR-CLZ, PTO-SCALAR-CMP-AND, PTO-SCALAR-CMP-ANDI, PTO-SCALAR-CMP-EQ, PTO-SCALAR-CMP-EQI, PTO-SCALAR-CMP-GE, PTO-SCALAR-CMP-GEI, PTO-SCALAR-CMP-GEU, PTO-SCALAR-CMP-GEUI, PTO-SCALAR-CMP-LT, PTO-SCALAR-CMP-LTI, PTO-SCALAR-CMP-LTU, PTO-SCALAR-CMP-LTUI, PTO-SCALAR-CMP-NE, PTO-SCALAR-CMP-NEI, PTO-SCALAR-CMP-OR, PTO-SCALAR-CMP-ORI, PTO-SCALAR-CSEL, PTO-SCALAR-CTZ, PTO-SCALAR-DC-CISW, PTO-SCALAR-DC-CIVA, PTO-SCALAR-DC-CSW, PTO-SCALAR-DC-CVA, PTO-SCALAR-DC-IALL, PTO-SCALAR-DC-ISW, PTO-SCALAR-DC-IVA, PTO-SCALAR-DC-ZVA, PTO-SCALAR-DIV, PTO-SCALAR-DIVU, PTO-SCALAR-DIVUW, PTO-SCALAR-DIVW, PTO-SCALAR-DMA, PTO-SCALAR-EBREAK, PTO-SCALAR-FABS, PTO-SCALAR-FADD, PTO-SCALAR-FCVT, PTO-SCALAR-FCVTA, PTO-SCALAR-FCVTM, PTO-SCALAR-FCVTN, PTO-SCALAR-FCVTP, PTO-SCALAR-FCVTZ, PTO-SCALAR-FDIV, PTO-SCALAR-FENCE-D, PTO-SCALAR-FENCE-I, PTO-SCALAR-FEQ, PTO-SCALAR-FEQS, PTO-SCALAR-FEXP, PTO-SCALAR-FGE, PTO-SCALAR-FGES, PTO-SCALAR-FLT, PTO-SCALAR-FLTS, PTO-SCALAR-FMADD, PTO-SCALAR-FMAX, PTO-SCALAR-FMIN, PTO-SCALAR-FMSUB, PTO-SCALAR-FMUL, PTO-SCALAR-FNE, PTO-SCALAR-FNES, PTO-SCALAR-FNMADD, PTO-SCALAR-FNMSUB, PTO-SCALAR-FRECIP, PTO-SCALAR-FSQRT, PTO-SCALAR-FSUB, PTO-SCALAR-HL-ADDI, PTO-SCALAR-HL-ADDIW, PTO-SCALAR-HL-ADDTPC, PTO-SCALAR-HL-ANDI, PTO-SCALAR-HL-ANDIW, PTO-SCALAR-HL-BFI, PTO-SCALAR-HL-CASB, PTO-SCALAR-HL-CASD, PTO-SCALAR-HL-CASH, PTO-SCALAR-HL-CASW, PTO-SCALAR-HL-CCAT, PTO-SCALAR-HL-CCATW, PTO-SCALAR-HL-CMP-ANDI, PTO-SCALAR-HL-CMP-EQI, PTO-SCALAR-HL-CMP-GEI, PTO-SCALAR-HL-CMP-GEUI, PTO-SCALAR-HL-CMP-LTI, PTO-SCALAR-HL-CMP-LTUI, PTO-SCALAR-HL-CMP-NEI, PTO-SCALAR-HL-CMP-ORI, PTO-SCALAR-HL-DIV, PTO-SCALAR-HL-DIVU, PTO-SCALAR-HL-DIVUW, PTO-SCALAR-HL-DIVW, PTO-SCALAR-HL-LB-PCR, PTO-SCALAR-HL-LB-PO, PTO-SCALAR-HL-LB-PR, PTO-SCALAR-HL-LBI, PTO-SCALAR-HL-LBI-PO, PTO-SCALAR-HL-LBI-PR, PTO-SCALAR-HL-LBIP, PTO-SCALAR-HL-LBP, PTO-SCALAR-HL-LBU-PCR, PTO-SCALAR-HL-LBU-PO, PTO-SCALAR-HL-LBU-PR, PTO-SCALAR-HL-LBUI, PTO-SCALAR-HL-LBUI-PO, PTO-SCALAR-HL-LBUI-PR, PTO-SCALAR-HL-LBUIP, PTO-SCALAR-HL-LBUP, PTO-SCALAR-HL-LD-PCR, PTO-SCALAR-HL-LD-PO, PTO-SCALAR-HL-LD-PR, PTO-SCALAR-HL-LDI, PTO-SCALAR-HL-LDI-PO, PTO-SCALAR-HL-LDI-PR, PTO-SCALAR-HL-LDI-U, PTO-SCALAR-HL-LDI-UPO, PTO-SCALAR-HL-LDI-UPR, PTO-SCALAR-HL-LDIP, PTO-SCALAR-HL-LDIP-U, PTO-SCALAR-HL-LDP, PTO-SCALAR-HL-LH-PCR, PTO-SCALAR-HL-LH-PO, PTO-SCALAR-HL-LH-PR, PTO-SCALAR-HL-LHI, PTO-SCALAR-HL-LHI-PO, PTO-SCALAR-HL-LHI-PR, PTO-SCALAR-HL-LHI-U, PTO-SCALAR-HL-LHI-UPO, PTO-SCALAR-HL-LHI-UPR, PTO-SCALAR-HL-LHIP, PTO-SCALAR-HL-LHIP-U, PTO-SCALAR-HL-LHP, PTO-SCALAR-HL-LHU-PCR, PTO-SCALAR-HL-LHU-PO, PTO-SCALAR-HL-LHU-PR, PTO-SCALAR-HL-LHUI, PTO-SCALAR-HL-LHUI-PO, PTO-SCALAR-HL-LHUI-PR, PTO-SCALAR-HL-LHUI-U, PTO-SCALAR-HL-LHUI-UPO, PTO-SCALAR-HL-LHUI-UPR, PTO-SCALAR-HL-LHUIP, PTO-SCALAR-HL-LHUIP-U, PTO-SCALAR-HL-LHUP, PTO-SCALAR-HL-LIS, PTO-SCALAR-HL-LIU, PTO-SCALAR-HL-LUI, PTO-SCALAR-HL-LW-PCR, PTO-SCALAR-HL-LW-PO, PTO-SCALAR-HL-LW-PR, PTO-SCALAR-HL-LWI, PTO-SCALAR-HL-LWI-PO, PTO-SCALAR-HL-LWI-PR, PTO-SCALAR-HL-LWI-U, PTO-SCALAR-HL-LWI-UPO, PTO-SCALAR-HL-LWI-UPR, PTO-SCALAR-HL-LWIP, PTO-SCALAR-HL-LWIP-U, PTO-SCALAR-HL-LWP, PTO-SCALAR-HL-LWU-PCR, PTO-SCALAR-HL-LWU-PO, PTO-SCALAR-HL-LWU-PR, PTO-SCALAR-HL-LWUI, PTO-SCALAR-HL-LWUI-PO, PTO-SCALAR-HL-LWUI-PR, PTO-SCALAR-HL-LWUI-U, PTO-SCALAR-HL-LWUI-UPO, PTO-SCALAR-HL-LWUI-UPR, PTO-SCALAR-HL-LWUIP, PTO-SCALAR-HL-LWUIP-U, PTO-SCALAR-HL-LWUP, PTO-SCALAR-HL-MADD, PTO-SCALAR-HL-MADDW, PTO-SCALAR-HL-MIADD, PTO-SCALAR-HL-MISUB, PTO-SCALAR-HL-MUL, PTO-SCALAR-HL-MULU, PTO-SCALAR-HL-ORI, PTO-SCALAR-HL-ORIW, PTO-SCALAR-HL-PRF, PTO-SCALAR-HL-PRF-A, PTO-SCALAR-HL-PRFI-U, PTO-SCALAR-HL-PRFI-UA, PTO-SCALAR-HL-REM, PTO-SCALAR-HL-REMU, PTO-SCALAR-HL-REMUW, PTO-SCALAR-HL-REMW, PTO-SCALAR-HL-SB-PCR, PTO-SCALAR-HL-SB-PO, PTO-SCALAR-HL-SB-PR, PTO-SCALAR-HL-SBI, PTO-SCALAR-HL-SBI-PO, PTO-SCALAR-HL-SBI-PR, PTO-SCALAR-HL-SBIP, PTO-SCALAR-HL-SBP, PTO-SCALAR-HL-SD-PCR, PTO-SCALAR-HL-SD-PO, PTO-SCALAR-HL-SD-PR, PTO-SCALAR-HL-SD-UPO, PTO-SCALAR-HL-SD-UPR, PTO-SCALAR-HL-SDI, PTO-SCALAR-HL-SDI-PO, PTO-SCALAR-HL-SDI-PR, PTO-SCALAR-HL-SDI-U, PTO-SCALAR-HL-SDI-UPO, PTO-SCALAR-HL-SDI-UPR, PTO-SCALAR-HL-SDIP, PTO-SCALAR-HL-SDIP-U, PTO-SCALAR-HL-SDP, PTO-SCALAR-HL-SDP-U, PTO-SCALAR-HL-SETC-ANDI, PTO-SCALAR-HL-SETC-EQI, PTO-SCALAR-HL-SETC-GEI, PTO-SCALAR-HL-SETC-GEUI, PTO-SCALAR-HL-SETC-LTI, PTO-SCALAR-HL-SETC-LTUI, PTO-SCALAR-HL-SETC-NEI, PTO-SCALAR-HL-SETC-ORI, PTO-SCALAR-HL-SETRET, PTO-SCALAR-HL-SH-PCR, PTO-SCALAR-HL-SH-PO, PTO-SCALAR-HL-SH-PR, PTO-SCALAR-HL-SH-UPO, PTO-SCALAR-HL-SH-UPR, PTO-SCALAR-HL-SHI, PTO-SCALAR-HL-SHI-PO, PTO-SCALAR-HL-SHI-PR, PTO-SCALAR-HL-SHI-U, PTO-SCALAR-HL-SHI-UPO, PTO-SCALAR-HL-SHI-UPR, PTO-SCALAR-HL-SHIP, PTO-SCALAR-HL-SHIP-U, PTO-SCALAR-HL-SHP, PTO-SCALAR-HL-SHP-U, PTO-SCALAR-HL-SSRGET, PTO-SCALAR-HL-SSRSET, PTO-SCALAR-HL-SUBI, PTO-SCALAR-HL-SUBIW, PTO-SCALAR-HL-SW-PCR, PTO-SCALAR-HL-SW-PO, PTO-SCALAR-HL-SW-PR, PTO-SCALAR-HL-SW-UPO, PTO-SCALAR-HL-SW-UPR, PTO-SCALAR-HL-SWI, PTO-SCALAR-HL-SWI-PO, PTO-SCALAR-HL-SWI-PR, PTO-SCALAR-HL-SWI-U, PTO-SCALAR-HL-SWI-UPO, PTO-SCALAR-HL-SWI-UPR, PTO-SCALAR-HL-SWIP, PTO-SCALAR-HL-SWIP-U, PTO-SCALAR-HL-SWP, PTO-SCALAR-HL-SWP-U, PTO-SCALAR-HL-XORI, PTO-SCALAR-HL-XORIW, PTO-SCALAR-IC-IALL, PTO-SCALAR-IC-IVA, PTO-SCALAR-J, PTO-SCALAR-JR, PTO-SCALAR-LB, PTO-SCALAR-LB-PCR, PTO-SCALAR-LBI, PTO-SCALAR-LBU, PTO-SCALAR-LBU-PCR, PTO-SCALAR-LBUI, PTO-SCALAR-LD, PTO-SCALAR-LD-ADD, PTO-SCALAR-LD-AND, PTO-SCALAR-LD-OR, PTO-SCALAR-LD-PCR, PTO-SCALAR-LD-SMAX, PTO-SCALAR-LD-SMIN, PTO-SCALAR-LD-UMAX, PTO-SCALAR-LD-UMIN, PTO-SCALAR-LD-XOR, PTO-SCALAR-LDI, PTO-SCALAR-LDI-U, PTO-SCALAR-LH, PTO-SCALAR-LH-PCR, PTO-SCALAR-LHI, PTO-SCALAR-LHI-U, PTO-SCALAR-LHU, PTO-SCALAR-LHU-PCR, PTO-SCALAR-LHUI, PTO-SCALAR-LHUI-U, PTO-SCALAR-LR-B, PTO-SCALAR-LR-D, PTO-SCALAR-LR-H, PTO-SCALAR-LR-W, PTO-SCALAR-LSRGET, PTO-SCALAR-LUI, PTO-SCALAR-LW, PTO-SCALAR-LW-ADD, PTO-SCALAR-LW-AND, PTO-SCALAR-LW-OR, PTO-SCALAR-LW-PCR, PTO-SCALAR-LW-SMAX, PTO-SCALAR-LW-SMIN, PTO-SCALAR-LW-UMAX, PTO-SCALAR-LW-UMIN, PTO-SCALAR-LW-XOR, PTO-SCALAR-LWI, PTO-SCALAR-LWI-U, PTO-SCALAR-LWU, PTO-SCALAR-LWU-PCR, PTO-SCALAR-LWUI, PTO-SCALAR-LWUI-U, PTO-SCALAR-MADD, PTO-SCALAR-MADDW, PTO-SCALAR-MAX, PTO-SCALAR-MAXU, PTO-SCALAR-MIN, PTO-SCALAR-MINU, PTO-SCALAR-MUL, PTO-SCALAR-MULU, PTO-SCALAR-MULUW, PTO-SCALAR-MULW, PTO-SCALAR-OR, PTO-SCALAR-ORI, PTO-SCALAR-ORIW, PTO-SCALAR-ORW, PTO-SCALAR-PRF, PTO-SCALAR-PRFI-U, PTO-SCALAR-REM, PTO-SCALAR-REMU, PTO-SCALAR-REMUW, PTO-SCALAR-REMW, PTO-SCALAR-REV, PTO-SCALAR-SB, PTO-SCALAR-SB-PCR, PTO-SCALAR-SBI, PTO-SCALAR-SC-B, PTO-SCALAR-SC-D, PTO-SCALAR-SC-H, PTO-SCALAR-SC-W, PTO-SCALAR-SCVTF, PTO-SCALAR-SD, PTO-SCALAR-SD-ADD, PTO-SCALAR-SD-AND, PTO-SCALAR-SD-OR, PTO-SCALAR-SD-PCR, PTO-SCALAR-SD-SMAX, PTO-SCALAR-SD-SMIN, PTO-SCALAR-SD-U, PTO-SCALAR-SD-UMAX, PTO-SCALAR-SD-UMIN, PTO-SCALAR-SD-XOR, PTO-SCALAR-SDI, PTO-SCALAR-SDI-U, PTO-SCALAR-SETC-AND, PTO-SCALAR-SETC-ANDI, PTO-SCALAR-SETC-EQ, PTO-SCALAR-SETC-EQI, PTO-SCALAR-SETC-GE, PTO-SCALAR-SETC-GEI, PTO-SCALAR-SETC-GEU, PTO-SCALAR-SETC-GEUI, PTO-SCALAR-SETC-LT, PTO-SCALAR-SETC-LTI, PTO-SCALAR-SETC-LTU, PTO-SCALAR-SETC-LTUI, PTO-SCALAR-SETC-NE, PTO-SCALAR-SETC-NEI, PTO-SCALAR-SETC-OR, PTO-SCALAR-SETC-ORI, PTO-SCALAR-SETC-TGT, PTO-SCALAR-SETRET, PTO-SCALAR-SH, PTO-SCALAR-SH-PCR, PTO-SCALAR-SH-U, PTO-SCALAR-SHI, PTO-SCALAR-SHI-U, PTO-SCALAR-SLL, PTO-SCALAR-SLLI, PTO-SCALAR-SLLIW, PTO-SCALAR-SLLW, PTO-SCALAR-SRA, PTO-SCALAR-SRAI, PTO-SCALAR-SRAIW, PTO-SCALAR-SRAW, PTO-SCALAR-SRL, PTO-SCALAR-SRLI, PTO-SCALAR-SRLIW, PTO-SCALAR-SRLW, PTO-SCALAR-SSRGET, PTO-SCALAR-SSRSET, PTO-SCALAR-SSRSWAP, PTO-SCALAR-SUB, PTO-SCALAR-SUBI, PTO-SCALAR-SUBIW, PTO-SCALAR-SUBW, PTO-SCALAR-SW, PTO-SCALAR-SW-ADD, PTO-SCALAR-SW-AND, PTO-SCALAR-SW-OR, PTO-SCALAR-SW-PCR, PTO-SCALAR-SW-SMAX, PTO-SCALAR-SW-SMIN, PTO-SCALAR-SW-U, PTO-SCALAR-SW-UMAX, PTO-SCALAR-SW-UMIN, PTO-SCALAR-SW-XOR, PTO-SCALAR-SWAPB, PTO-SCALAR-SWAPD, PTO-SCALAR-SWAPH, PTO-SCALAR-SWAPW, PTO-SCALAR-SWI, PTO-SCALAR-SWI-U, PTO-SCALAR-TLB-IA, PTO-SCALAR-TLB-IALL, PTO-SCALAR-TLB-IAV, PTO-SCALAR-TLB-IV, PTO-SCALAR-UCVTF, PTO-SCALAR-XOR, PTO-SCALAR-XORI, PTO-SCALAR-XORIW, PTO-SCALAR-XORW, PTO-TILE-GMOV, PTO-TILE-MGATHER, PTO-TILE-MGATHER-CAS, PTO-TILE-MGATHER-MASK, PTO-TILE-MSCATTER, PTO-TILE-MSCATTER-MASK, PTO-TILE-TABS, PTO-TILE-TADD, PTO-TILE-TADDS, PTO-TILE-TAND, PTO-TILE-TANDS, PTO-TILE-TCI, PTO-TILE-TCMP, PTO-TILE-TCMPS, PTO-TILE-TCOLARGMAX, PTO-TILE-TCOLARGMIN, PTO-TILE-TCOLEXPAND, PTO-TILE-TCOLEXPANDADD, PTO-TILE-TCOLEXPANDDIV, PTO-TILE-TCOLEXPANDEXPDIF, PTO-TILE-TCOLEXPANDMAX, PTO-TILE-TCOLEXPANDMIN, PTO-TILE-TCOLEXPANDMUL, PTO-TILE-TCOLEXPANDSUB, PTO-TILE-TCOLMAX, PTO-TILE-TCOLMIN, PTO-TILE-TCOLPROD, PTO-TILE-TCOLSUM, PTO-TILE-TCONCAT, PTO-TILE-TCVT, PTO-TILE-TDEQUANT, PTO-TILE-TDIV, PTO-TILE-TDIVS, PTO-TILE-TEXP, PTO-TILE-TEXPANDS, PTO-TILE-TEXTRACT, PTO-TILE-TFMA, PTO-TILE-TGATHER, PTO-TILE-TGEMV, PTO-TILE-TGEMV-ACC, PTO-TILE-TGEMV-BIAS, PTO-TILE-TGEMV-MX, PTO-TILE-TGEMV-MX-ACC, PTO-TILE-TGEMV-MX-BIAS, PTO-TILE-THISTOGRAM, PTO-TILE-TIMG2COL, PTO-TILE-TINSERT, PTO-TILE-TLOAD, PTO-TILE-TLOG, PTO-TILE-TMATMUL, PTO-TILE-TMATMUL-ACC, PTO-TILE-TMATMUL-BIAS, PTO-TILE-TMATMUL-MX, PTO-TILE-TMATMUL-MX-ACC, PTO-TILE-TMATMUL-MX-BIAS, PTO-TILE-TMAX, PTO-TILE-TMAXS, PTO-TILE-TMIN, PTO-TILE-TMINS, PTO-TILE-TMOV, PTO-TILE-TMRGSORT, PTO-TILE-TMUL, PTO-TILE-TMULS, PTO-TILE-TNEG, PTO-TILE-TNOT, PTO-TILE-TOR, PTO-TILE-TORS, PTO-TILE-TPREFETCH, PTO-TILE-TQUANT, PTO-TILE-TRECIP, PTO-TILE-TRELU, PTO-TILE-TREM, PTO-TILE-TREMS, PTO-TILE-TROWARGMAX, PTO-TILE-TROWARGMIN, PTO-TILE-TROWEXPAND, PTO-TILE-TROWEXPANDADD, PTO-TILE-TROWEXPANDDIV, PTO-TILE-TROWEXPANDEXPDIF, PTO-TILE-TROWEXPANDMAX, PTO-TILE-TROWEXPANDMIN, PTO-TILE-TROWEXPANDMUL, PTO-TILE-TROWEXPANDSUB, PTO-TILE-TROWMAX, PTO-TILE-TROWMIN, PTO-TILE-TROWPROD, PTO-TILE-TROWSUM, PTO-TILE-TRSQRT, PTO-TILE-TSCATTER, PTO-TILE-TSEL, PTO-TILE-TSELS, PTO-TILE-TSHL, PTO-TILE-TSHLS, PTO-TILE-TSHR, PTO-TILE-TSHRS, PTO-TILE-TSORT, PTO-TILE-TSQRT, PTO-TILE-TSTORE, PTO-TILE-TSUB, PTO-TILE-TSUBS, PTO-TILE-TTRI, PTO-TILE-TXOR, PTO-TILE-TXORS
Affected NDF
PTO-ACRC-DECISION-BINDING-001, PTO-ACRE-IMPLICIT-STOP-001, PTO-ADD-DECISION-BINDING-001, PTO-ADDTPC-PAGE-001, PTO-AND-DECISION-BINDING-001, PTO-ARCH-COMMIT-EVENT-CONFORMANCE-001, PTO-ARCH-CONDITIONAL-BRANCH-RESERVATION-001, PTO-ARCH-ENCODING-OWNERSHIP-001, PTO-ARCH-STATE-CLOSURE-001, PTO-ARCH-TEPL-ALIAS-001, PTO-ARCH-TILE-EXECUTION-ENGINE-001, PTO-ARCH-TILE-INSTRUCTION-CLASS-001, PTO-B-CATR-CONTROL-001, PTO-B-DATR-FIELDS-001, PTO-B-DIM-WRITE-001, PTO-B-FPATR-MATRIX-POSTPROCESS-001, PTO-B-HINT-LIFECYCLE-001, PTO-B-IOR-BINDING-001, PTO-B-IOS-SHARED-STATE-001, PTO-B-IOT-STREAM-001, PTO-BCNT-DECISION-BINDING-001, PTO-BIC-DECISION-BINDING-001, PTO-BIS-DECISION-BINDING-001, PTO-BLOCK-ERCOV-RESERVED-001, PTO-BLOCK-ESAVE-RESERVED-001, PTO-BLOCK-MSET-FILL-001, PTO-BLOCK-XB-RESERVED-001, PTO-BSE-DECISION-BINDING-001, PTO-BSTART-CALL-DECISION-BINDING-001, PTO-BSTART-DECISION-BINDING-001, PTO-BSTART-FP-CONTROL-001, PTO-BSTART-GMOV-COLLECTIVE-001, PTO-BSTART-ICALL-DECISION-BINDING-001, PTO-BSTART-MGATHER-CAS-SCHEMA-001, PTO-BSTART-MGATHER-MASK-SCHEMA-001, PTO-BSTART-MGATHER-SCHEMA-001, PTO-BSTART-MSCATTER-MASK-SCHEMA-001, PTO-BSTART-MSCATTER-SCHEMA-001, PTO-BSTART-SFU-DECISION-BINDING-001, PTO-BSTART-STD-CONTROL-001, PTO-BSTART-SYS-CONTROL-001, PTO-BSTART-TEPL-DECISION-BINDING-001, PTO-BSTART-TGEMV-ACC-CONTRACT-001, PTO-BSTART-TGEMV-BIAS-CONTRACT-001, PTO-BSTART-TGEMV-CONTRACT-001, PTO-BSTART-TGEMVMX-ACC-CONTRACT-001, PTO-BSTART-TGEMVMX-BIAS-CONTRACT-001, PTO-BSTART-TGEMVMX-CONTRACT-001, PTO-BSTART-TLOAD-CUBE-001, PTO-BSTART-TLOAD-MEMORY-001, PTO-BSTART-TMATMUL-ACC-CONTRACT-001, PTO-BSTART-TMATMUL-BIAS-CONTRACT-001, PTO-BSTART-TMATMUL-CONTRACT-001, PTO-BSTART-TMATMULMX-ACC-CONTRACT-001, PTO-BSTART-TMATMULMX-BIAS-CONTRACT-001, PTO-BSTART-TMATMULMX-CONTRACT-001, PTO-BSTART-TMOV-SHARED-001, PTO-BSTART-TPREFETCH-MEMORY-001, PTO-BSTART-TSTORE-CUBE-001, PTO-BSTART-TSTORE-MEMORY-001, PTO-BSTART-VEC-DECISION-BINDING-001, PTO-BSTOP-DECISION-BINDING-001, PTO-BWE-DECISION-BINDING-001, PTO-BWI-DECISION-BINDING-001, PTO-BWT-DECISION-BINDING-001, PTO-BXS-DECISION-BINDING-001, PTO-BXU-DECISION-BINDING-001, PTO-C-BSTART-CONTROL-001, PTO-C-BSTART-FP-CONTROL-001, PTO-C-BSTART-STD-CONTROL-001, PTO-C-BSTART-SYS-CONTROL-001, PTO-C-BSTOP-DECISION-BINDING-001, PTO-C-CMP-EQI-DECISION-BINDING-001, PTO-C-CMP-NEI-DECISION-BINDING-001, PTO-C-EBREAK-CAUSE-001, PTO-C-SETC-EQ-CONDITIONAL-SETTER-001, PTO-C-SETC-NE-CONDITIONAL-SETTER-001, PTO-C-SETC-TGT-SNAPSHOT-001, PTO-C-SETRET-DECISION-BINDING-001, PTO-C-SSRGET-DIRECT-IDS-001, PTO-CLZ-DECISION-BINDING-001, PTO-CTZ-DECISION-BINDING-001, PTO-CUBE-CELL-TRANSPORT-001, PTO-EBREAK-DECISION-BINDING-001, PTO-FABS-DECISION-BINDING-001, PTO-FCVTA-DECISION-BINDING-001, PTO-FCVTM-DECISION-BINDING-001, PTO-FCVTN-DECISION-BINDING-001, PTO-FCVTP-DECISION-BINDING-001, PTO-FCVTZ-DECISION-BINDING-001, PTO-FENCE-D-DECISION-BINDING-001, PTO-FENCE-I-DECISION-BINDING-001, PTO-FENTRY-RESTARTABLE-FRAME-001, PTO-FEXIT-RESTARTABLE-FRAME-001, PTO-FMAX-DECISION-BINDING-001, PTO-FMIN-DECISION-BINDING-001, PTO-FNE-DECISION-BINDING-001, PTO-FNES-DECISION-BINDING-001, PTO-FRET-RA-RESTARTABLE-FRAME-001, PTO-FRET-STK-RESTARTABLE-FRAME-001, PTO-GMOV-CORE4-PEER-001, PTO-HL-ADDI-CONTRACT-001, PTO-HL-ADDIW-CONTRACT-001, PTO-HL-ADDTPC-PAGE-001, PTO-HL-ANDI-CONTRACT-001, PTO-HL-ANDIW-CONTRACT-001, PTO-HL-BFI-DECISION-BINDING-001, PTO-HL-CCAT-CONTRACT-001, PTO-HL-CCATW-CONTRACT-001, PTO-HL-DIV-DECISION-BINDING-001, PTO-HL-DIVU-DECISION-BINDING-001, PTO-HL-DIVUW-DECISION-BINDING-001, PTO-HL-DIVW-DECISION-BINDING-001, PTO-HL-LIS-DECISION-BINDING-001, PTO-HL-LUI-UPPER-HALF-001, PTO-HL-MADDW-WORD-HALVES-001, PTO-HL-ORI-CONTRACT-001, PTO-HL-ORIW-CONTRACT-001, PTO-HL-PRF-A-CACHE-MODEL-001, PTO-HL-PRF-CACHE-MODEL-001, PTO-HL-PRFI-U-CACHE-MODEL-001, PTO-HL-PRFI-UA-CACHE-MODEL-001, PTO-HL-QMT-GQM-001, PTO-HL-QPOP-GQM-001, PTO-HL-QPUSH-GQM-001, PTO-HL-REM-RESULT-ORDER-001, PTO-HL-REMU-RESULT-ORDER-001, PTO-HL-REMUW-RESULT-ORDER-001, PTO-HL-REMW-RESULT-ORDER-001, PTO-HL-SD-UPO-DECISION-BINDING-001, PTO-HL-SD-UPR-DECISION-BINDING-001, PTO-HL-SETC-ANDI-CONDITIONAL-SETTER-001, PTO-HL-SETC-EQI-CONDITIONAL-SETTER-001, PTO-HL-SETC-GEI-CONDITIONAL-SETTER-001, PTO-HL-SETC-GEUI-CONDITIONAL-SETTER-001, PTO-HL-SETC-LTI-CONDITIONAL-SETTER-001, PTO-HL-SETC-LTUI-CONDITIONAL-SETTER-001, PTO-HL-SETC-NEI-CONDITIONAL-SETTER-001, PTO-HL-SETC-ORI-CONDITIONAL-SETTER-001, PTO-HL-SETRET-DECISION-BINDING-001, PTO-HL-SH-UPO-DECISION-BINDING-001, PTO-HL-SH-UPR-DECISION-BINDING-001, PTO-HL-SSRGET-DECISION-BINDING-001, PTO-HL-SSRSET-DECISION-BINDING-001, PTO-HL-SUBI-CONTRACT-001, PTO-HL-SUBIW-CONTRACT-001, PTO-HL-SW-UPO-DECISION-BINDING-001, PTO-HL-SW-UPR-DECISION-BINDING-001, PTO-HL-XORI-CONTRACT-001, PTO-HL-XORIW-CONTRACT-001, PTO-J-DECISION-BINDING-001, PTO-JR-DECISION-BINDING-001, PTO-L-BSTOP-DECISION-BINDING-001, PTO-LSRGET-BARG-001, PTO-MCOPY-RESTART-001, PTO-MGATHER-BYTE-DISPLACEMENT-001, PTO-MGATHER-CAS-ATOMIC-001, PTO-MGATHER-CAS-PUBLICATION-001, PTO-MGATHER-MASK-PREDICATE-001, PTO-MGATHER-MASK-PUBLICATION-001, PTO-MGATHER-MASK-TYPE-002, PTO-MSCATTER-BYTE-DISPLACEMENT-001, PTO-MSCATTER-DUPLICATE-ORDER-001, PTO-MSCATTER-MASK-DUPLICATE-001, PTO-MSCATTER-MASK-PREDICATE-001, PTO-MSCATTER-MASK-TYPE-002, PTO-NUMERIC-FORMAT-DESCRIPTOR-001, PTO-OR-DECISION-BINDING-001, PTO-PRF-NONFAULTING-HINT-001, PTO-PRFI-U-NONFAULTING-HINT-001, PTO-RELEASE-VERIFICATION, PTO-REV-DECISION-BINDING-001, PTO-SCVTF-DECISION-BINDING-001, PTO-SD-U-ADR-CONTRACT-001, PTO-SD-XOR-ADR-CONTRACT-001, PTO-SDI-ADR-CONTRACT-001, PTO-SDI-U-ADR-CONTRACT-001, PTO-SETC-AND-CONDITIONAL-SETTER-001, PTO-SETC-ANDI-CONDITIONAL-SETTER-001, PTO-SETC-EQ-CONDITIONAL-SETTER-001, PTO-SETC-EQI-CONDITIONAL-SETTER-001, PTO-SETC-GE-CONDITIONAL-SETTER-001, PTO-SETC-GEI-CONDITIONAL-SETTER-001, PTO-SETC-GEU-CONDITIONAL-SETTER-001, PTO-SETC-GEUI-CONDITIONAL-SETTER-001, PTO-SETC-LT-CONDITIONAL-SETTER-001, PTO-SETC-LTI-CONDITIONAL-SETTER-001, PTO-SETC-LTU-CONDITIONAL-SETTER-001, PTO-SETC-LTUI-CONDITIONAL-SETTER-001, PTO-SETC-NE-CONDITIONAL-SETTER-001, PTO-SETC-NEI-CONDITIONAL-SETTER-001, PTO-SETC-OR-CONDITIONAL-SETTER-001, PTO-SETC-ORI-CONDITIONAL-SETTER-001, PTO-SETC-TGT-ADR-CONTRACT-001, PTO-SETRET-ADR-CONTRACT-001, PTO-SH-ADR-CONTRACT-001, PTO-SH-PCR-ADR-CONTRACT-001, PTO-SH-U-ADR-CONTRACT-001, PTO-SHI-ADR-CONTRACT-001, PTO-SHI-U-ADR-CONTRACT-001, PTO-SLL-ADR-CONTRACT-001, PTO-SLLI-ADR-CONTRACT-001, PTO-SLLIW-ADR-CONTRACT-001, PTO-SLLW-ADR-CONTRACT-001, PTO-SOURCE-HIERARCHY, PTO-SRA-ADR-CONTRACT-001, PTO-SRAI-ADR-CONTRACT-001, PTO-SRAIW-ADR-CONTRACT-001, PTO-SRAW-ADR-CONTRACT-001, PTO-SRL-ADR-CONTRACT-001, PTO-SRLI-ADR-CONTRACT-001, PTO-SRLIW-ADR-CONTRACT-001, PTO-SRLW-ADR-CONTRACT-001, PTO-SSRGET-ADR-CONTRACT-001, PTO-SSRSET-ADR-CONTRACT-001, PTO-SSRSWAP-ADR-CONTRACT-001, PTO-SUB-ADR-CONTRACT-001, PTO-SUBI-ADR-CONTRACT-001, PTO-SUBIW-ADR-CONTRACT-001, PTO-SUBW-ADR-CONTRACT-001, PTO-SW-ADD-ADR-CONTRACT-001, PTO-SW-ADR-CONTRACT-001, PTO-SW-AND-ADR-CONTRACT-001, PTO-SW-OR-ADR-CONTRACT-001, PTO-SW-PCR-ADR-CONTRACT-001, PTO-SW-SMAX-ADR-CONTRACT-001, PTO-SW-SMIN-ADR-CONTRACT-001, PTO-SW-U-ADR-CONTRACT-001, PTO-SW-UMAX-ADR-CONTRACT-001, PTO-SW-UMIN-ADR-CONTRACT-001, PTO-SW-XOR-ADR-CONTRACT-001, PTO-SWAPB-ADR-CONTRACT-001, PTO-SWAPD-ADR-CONTRACT-001, PTO-SWAPH-ADR-CONTRACT-001, PTO-SWAPW-ADR-CONTRACT-001, PTO-SWI-ADR-CONTRACT-001, PTO-SWI-U-ADR-CONTRACT-001, PTO-TABS-CONTRACT-001, PTO-TADD-CONTRACT-001, PTO-TADDS-CONTRACT-001, PTO-TAND-CONTRACT-001, PTO-TANDS-CONTRACT-001, PTO-TCI-CONTRACT-001, PTO-TCMP-CONTRACT-001, PTO-TCMPS-CONTRACT-001, PTO-TCOLARGMAX-CONTRACT-001, PTO-TCOLARGMIN-CONTRACT-001, PTO-TCOLEXPAND-CONTRACT-001, PTO-TCOLEXPANDADD-CONTRACT-001, PTO-TCOLEXPANDDIV-CONTRACT-001, PTO-TCOLEXPANDEXPDIF-CONTRACT-001, PTO-TCOLEXPANDMAX-CONTRACT-001, PTO-TCOLEXPANDMIN-CONTRACT-001, PTO-TCOLEXPANDMUL-CONTRACT-001, PTO-TCOLEXPANDSUB-CONTRACT-001, PTO-TCOLMAX-CONTRACT-001, PTO-TCOLMIN-CONTRACT-001, PTO-TCOLPROD-CONTRACT-001, PTO-TCOLSUM-CONTRACT-001, PTO-TCONCAT-CONTRACT-001, PTO-TCVT-CONTRACT-001, PTO-TDEQUANT-CONTRACT-001, PTO-TDIV-CONTRACT-001, PTO-TDIVS-CONTRACT-001, PTO-TEXP-CONTRACT-001, PTO-TEXPANDS-CONTRACT-001, PTO-TEXTRACT-CONTRACT-001, PTO-TFMA-CONTRACT-001, PTO-TGATHER-CONTRACT-001, PTO-TGEMV-ACC-CONTRACT-001, PTO-TGEMV-BIAS-CONTRACT-001, PTO-TGEMV-CONTRACT-001, PTO-TGEMV-MX-ACC-CONTRACT-001, PTO-TGEMV-MX-BIAS-CONTRACT-001, PTO-TGEMV-MX-CONTRACT-001, PTO-THISTOGRAM-CONTRACT-001, PTO-TILE-CAPACITY-PER-PE, PTO-TIMG2COL-CONTRACT-001, PTO-TINSERT-CONTRACT-001, PTO-TLB-IA-ADR-CONTRACT-001, PTO-TLB-IALL-ADR-CONTRACT-001, PTO-TLB-IAV-ADR-CONTRACT-001, PTO-TLB-IV-ADR-CONTRACT-001, PTO-TLOAD-CUBE-001, PTO-TLOAD-MEMORY-001, PTO-TLOG-CONTRACT-001, PTO-TMATMUL-ACC-CONTRACT-001, PTO-TMATMUL-BIAS-CONTRACT-001, PTO-TMATMUL-CONTRACT-001, PTO-TMATMUL-MX-ACC-CONTRACT-001, PTO-TMATMUL-MX-BIAS-CONTRACT-001, PTO-TMATMUL-MX-CONTRACT-001, PTO-TMAX-CONTRACT-001, PTO-TMAXS-CONTRACT-001, PTO-TMIN-CONTRACT-001, PTO-TMINS-CONTRACT-001, PTO-TMOV-CONTRACT-001, PTO-TMRGSORT-CONTRACT-001, PTO-TMUL-CONTRACT-001, PTO-TMULS-CONTRACT-001, PTO-TNEG-CONTRACT-001, PTO-TNOT-CONTRACT-001, PTO-TOR-CONTRACT-001, PTO-TORS-CONTRACT-001, PTO-TPREFETCH-FOOTPRINT-001, PTO-TQUANT-CONTRACT-001, PTO-TRECIP-CONTRACT-001, PTO-TRELU-CONTRACT-001, PTO-TREM-CONTRACT-001, PTO-TREMS-CONTRACT-001, PTO-TROWARGMAX-CONTRACT-001, PTO-TROWARGMIN-CONTRACT-001, PTO-TROWEXPAND-CONTRACT-001, PTO-TROWEXPANDADD-CONTRACT-001, PTO-TROWEXPANDDIV-CONTRACT-001, PTO-TROWEXPANDEXPDIF-CONTRACT-001, PTO-TROWEXPANDMAX-CONTRACT-001, PTO-TROWEXPANDMIN-CONTRACT-001, PTO-TROWEXPANDMUL-CONTRACT-001, PTO-TROWEXPANDSUB-CONTRACT-001, PTO-TROWMAX-CONTRACT-001, PTO-TROWMIN-CONTRACT-001, PTO-TROWPROD-CONTRACT-001, PTO-TROWSUM-CONTRACT-001, PTO-TRSQRT-CONTRACT-001, PTO-TSCATTER-CONTRACT-001, PTO-TSEL-CONTRACT-001, PTO-TSELS-CONTRACT-001, PTO-TSHL-CONTRACT-001, PTO-TSHLS-CONTRACT-001, PTO-TSHR-CONTRACT-001, PTO-TSHRS-CONTRACT-001, PTO-TSORT-CONTRACT-001, PTO-TSQRT-CONTRACT-001, PTO-TSTORE-CUBE-001, PTO-TSTORE-MEMORY-001, PTO-TSUB-CONTRACT-001, PTO-TSUBS-CONTRACT-001, PTO-TTRI-CONTRACT-001, PTO-TXOR-CONTRACT-001, PTO-TXORS-CONTRACT-001, PTO-UCVTF-DECISION-BINDING-001, PTO-XOR-ADR-CONTRACT-001, PTO-XORI-ADR-CONTRACT-001, PTO-XORIW-ADR-CONTRACT-001, PTO-XORW-ADR-CONTRACT-001
SHA-256
f18d13f735cfaf9f2803c754c5818f4af33d1cc42c489f0d9ce060b07bb3a196
Open exact decision source ↗ for ADR-0059

Unit metadata

Open 11 generated metadata fields

assembly: [ "sc.d SrcL, [SrcR], ->Rd", "sc.d.aq SrcL, [SrcR], ->Rd", "sc.d.rl SrcL, [SrcR], ->Rd", "sc.d.f SrcL, [SrcR], ->Rd", "sc.d.aqrl SrcL, [SrcR], ->Rd", "sc.d.aqf SrcL, [SrcR], ->Rd", "sc.d.rlf SrcL, [SrcR], ->Rd", "sc.d.aqrlf SrcL, [SrcR], ->Rd" ]
block: []
catalog_indices: [ 381 ]
catalog_records: [ { "asm": "sc.d<.{aq, rl, f, aqrl, aqf, rlf, aqrlf}> SrcL, [SrcR], {->t, ->u, ->Rd}", "constraints": [], "encoding": [ { "index": 0, "mask": "0xf000707f", "match": "0x3000100b", "width_bits": 32 } ], "encoding_kind": "L32", "fields": [ { "name": "RegDst", "pieces": [ { "instruction_lsb": 7, "value_lsb": 0, "width": 5 } ], "signedness": "encoding-defined", "width": 5 }, { "name": "SrcL", "pieces": [ { "instruction_lsb": 15, "value_lsb": 0, "width": 5 } ], "signedness": "encoding-defined", "width": 5 }, { "name": "SrcR", "pieces": [ { "instruction_lsb": 20, "value_lsb": 0, "width": 5 } ], "signedness": "encoding-defined", "width": 5 }, { "name": "aq", "pieces": [ { "instruction_lsb": 26, "value_lsb": 0, "width": 1 } ], "signedness": "encoding-defined", "width": 1 }, { "name": "far", "pieces": [ { "instruction_lsb": 27, "value_lsb": 0, "width": 1 } ], "signedness": "encoding-defined", "width": 1 }, { "name": "rl", "pieces": [ { "instruction_lsb": 25, "value_lsb": 0, "width": 1 } ], "signedness": "encoding-defined", "width": 1 } ], "form_id": "sc_d_32_2e714149031c", "length_bits": 32, "mnemonic": "SC.D", "semantic_family": "AMO", "semantic_group": "AMO", "semantic_handler": "StoreConditional", "semantic_summary": "SC.D conditionally stores one doubleword when the local 64-byte-line reservation matches.", "status": "accepted" } ]
classification: [ "amo" ]
contract: { "block_composition": [ "none" ], "canonical_assembly": [ "sc.d SrcL, [SrcR], ->Rd", "sc.d.aq SrcL, [SrcR], ->Rd", "sc.d.rl SrcL, [SrcR], ->Rd", "sc.d.f SrcL, [SrcR], ->Rd", "sc.d.aqrl SrcL, [SrcR], ->Rd", "sc.d.aqf SrcL, [SrcR], ->Rd", "sc.d.rlf SrcL, [SrcR], ->Rd", "sc.d.aqrlf SrcL, [SrcR], ->Rd" ], "defaults": [ "SrcL, SrcR, and RegDst are required Reg5 fields. Encoded source zero reads the architectural zero register; encoded destination zero discards the status.", "aq=0 and rl=0 select relaxed ordering. aq=1 selects acquire, rl=1 selects release, and aq=1 with rl=1 selects acquire-release.", "far=0 selects the default flat-address route. far=1 is a profile routing hint; the reference profile preserves the same address and reservation comparison." ], "encoding_class": "standalone-encoded", "examples": [ "sc.d a0, [a1], ->a2", "sc.d.aqrl t#1, [u#1], ->u", "sc.d.f zero, [sp], ->t" ], "exceptions": [ "A line-matched effective address must be aligned to 8 bytes. On a line-matched attempt, alignment, translation, and write permission are checked after reservation clear and before memory or destination effects.", "A line-matched access fault reports the original address, emits no event, preserves memory and destination, and enters the ordinary trap envelope. Recovery restores the original TPC.", "A reservation miss is probe-free even for a misaligned or inaccessible address and therefore does not raise a data-access fault.", "An undecodable fixed-bit pattern raises Fault_IllegalInstruction before effects. All explicit field values are assigned." ], "field_contracts": {}, "field_zero_meanings": { "RegDst": "Encoded zero discards the success status.", "SrcL": "Encoded zero supplies numeric zero as the store value.", "SrcR": "Encoded zero reads the architectural zero register as the store address.", "aq": "Encoded zero disables acquire ordering.", "far": "Encoded zero selects the default flat-address route.", "rl": "Encoded zero disables release ordering." }, "legality": [ "All 32 SrcL and SrcR Reg5 encodings are assigned: 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4.", "All 32 RegDst encodings are assigned. Code 0 and codes 24..29 discard, code 30 pushes U, code 31 pushes T, and codes 1..23 write the named absolute GPR.", "All aq, rl, and far combinations are assigned. Reservation match is based only on the containing 64-byte line; LR byte address and width do not narrow it.", "A line-matched effective address must be aligned to 8 bytes." ], "memory_effects": [ "A matching reservation is cleared before access preflight. After successful preflight, store SrcL all 64 bits as one 8-byte little-endian doubleword, emit one ordered store event, and publish status zero.", "A missing or different-line reservation is cleared and publishes status one without alignment, translation, permission, bounded-memory probe, memory event, or memory access.", "The reservation is cleared by every attempt. A line-matched access fault leaves memory and destination unchanged; after recovery, reissue without a new LR is a probe-free miss." ], "operands": [ { "field": "SrcL", "role": "Reg5 doubleword store-value source" }, { "field": "SrcR", "role": "Reg5 store-address source" }, { "field": "RegDst", "role": "Reg5 success-status destination" }, { "field": "aq", "role": "acquire ordering bit" }, { "field": "rl", "role": "release ordering bit" }, { "field": "far", "role": "flat-address routing hint" } ], "ordering": [ "aq=0,rl=0 records relaxed ordering; aq=1,rl=0 acquire; aq=0,rl=1 release; aq=1,rl=1 acquire-release on a successful store.", "A reservation miss emits no memory event. far changes only the route hint in the reference profile." ], "standalone_opcode": true, "state_effects": [ "Snapshot SrcL and SrcR before reservation, memory, or destination effects, including repeated GPR and same-queue aliases.", "Publish status zero after a nonfaulting matching store and status one after a reservation miss. A line-matched fault publishes no status.", "Clear the local reservation for success, miss, and line-matched fault before any possible trap.", "Successful or miss completion advances TPC by four bytes. A line-matched fault saves the original TPC; recovery restores it, and reissue without a new LR completes as a miss." ] }
depends_on: [ "PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING" ]
id: PTO-SCALAR-SC-D
mnemonic: SC.D
summary: SC.D conditionally stores one doubleword when the local 64-byte-line reservation matches.
surface: scalar

Open generated traceability record

{
  "classification": [
    "amo"
  ],
  "documentation": "docs/scalar/amo/SC.D.md",
  "id": "PTO-SCALAR-SC-D",
  "instruction_contract": {
    "artifact": "spec/evidence/instruction-contract-closure.json",
    "mnemonic": "SC.D",
    "ndf_clause": "PTO-INST-SCALAR-SC-D"
  },
  "mnemonic": "SC.D",
  "readiness_subjects": [
    "ADR-0020",
    "ADR-0030",
    "ADR-0059"
  ],
  "semantic_tests": [
    "PTO-AVS-SCALAR-SC-D-MISS-001",
    "PTO-AVS-SCALAR-SC-D-PRECISE-001",
    "PTO-AVS-SCALAR-SC-D-SUCCESS-001"
  ],
  "source": "asl/scalar/amo/SC.D.asl",
  "surface": "scalar",
  "tests": [
    "PTO-AVS-SCALAR-SC-D-DECODE-001",
    "PTO-AVS-SCALAR-SC-D-MISS-001",
    "PTO-AVS-SCALAR-SC-D-PRECISE-001",
    "PTO-AVS-SCALAR-SC-D-SUCCESS-001"
  ]
}

Sources and release identity

Show commit, paths, hashes, version, and canonical owners

Release: 0.58.5 · Release candidate
Commit: 7dc8b7e5b121d2b2499a2273bebff29e2cd86812
Original ASL: asl/scalar/amo/SC.D.asl
ASL SHA-256: 1470acd517ab23e46d65cd48047f70c795a2a2795a7a7e19220d4c729bb14f97
Generated documentation: docs/scalar/amo/SC.D.md · embedded in this page
Documentation SHA-256: b6105a5ccf3c365a3c511ea3bbf68f7bce9995bfa3a4b9797d591e2b53530abd

Exact owners

ASL PTO-SCALAR-SC-D asl/scalar/amo/SC.D.asl
NDF PTO-INST-SCALAR-SC-D asl/scalar/amo/SC.D.asl

Assembly syntax

Assembler symbols

Encoding

Instruction contract

Operands and parameters

Constraints, checks, and faults

State reads, writes, and result

Decode source binding

Operation source binding

Behavior

What SC.D does

Atomic mechanism

Inputs and result

Effects and ordering

Legality and precise faults

illustrative example

Evidence index

Decision record

Decision record

Decision record

Unit metadata

Sources and release identity

Exact owners