Operands and parameters
RegDst- absolute GPR destination
imm20- signed 20-bit 4 KiB page displacement
ADDTPC - Add a signed 4 KiB page displacement to the current TPC.
PTO-SCALAR-ADDTPCaddtpc simm, ->{t, u, Rd}| Field | Bits | Signedness | Architectural role | Encoded zero |
|---|---|---|---|---|
RegDst | 5 | encoding-defined | absolute GPR destination | Encoded zero names the architectural zero GPR. |
imm20 | 20 | encoding-defined | signed 20-bit 4 KiB page displacement | Encoded zero contributes a zero page displacement and produces the current instruction TPC. |
Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.
| Decoded item | Bit range | Value |
|---|---|---|
| imm20 | 31:12 | variable |
| RegDst | 11:7 | variable |
| Constant | 6:0 | 7'b0000111 |
{
"reg": [
{
"bits": 7,
"name": "7'b0000111"
},
{
"bits": 5,
"name": "RegDst"
},
{
"bits": 20,
"name": "imm20"
}
],
"config": {
"bits": 32,
"fontsize": 13,
"hspace": 900,
"lanes": 1,
"offset": 0
}
}addtpc simm, ->{t, u, Rd}
RegDstimm20This Operation comes directly from the instruction owner; the page does not rewrite its behavior.
readonly func InstructionContractOperation_ADDTPC() => ScalarOperationbegin return ScalarOperation_ADDTPC;end;readonly func InstructionContractHandler_ADDTPC() => ScalarSemanticHandlerbegin return ScalarHandler_AddToPC;end;
pure func InstructionContractUsesTPC_ADDTPC() => booleanbegin return TRUE;end;
pure func InstructionContractImmediateWidth_ADDTPC() => integer {20}begin return 20;end;
pure func InstructionContractImmediateIsSigned_ADDTPC() => booleanbegin return TRUE;end;
pure func InstructionContractPageShift_ADDTPC() => integer {12}begin return 12;end;
pure func InstructionContractWritesTPC_ADDTPC() => booleanbegin return FALSE;end;
pure func InstructionContractTarget_ADDTPC( base: Word, page_offset: Word) => Wordbegin return base + LSL(page_offset, 12);end;// PTO-INSTRUCTION: {"assembly":["addtpc simm, ->{t, u, Rd}"],"block":[],"catalog_indices":[5],"catalog_records":[{"asm":"addtpc simm, ->{t, u, Rd}","constraints":[{"field":"RegDst","operator":"not-equal","value":10}],"encoding":[{"index":0,"mask":"0x0000007f","match":"0x00000007","width_bits":32}],"encoding_kind":"L32","fields":[{"name":"RegDst","pieces":[{"instruction_lsb":7,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5},{"name":"imm20","pieces":[{"instruction_lsb":12,"value_lsb":0,"width":20}],"signedness":"encoding-defined","width":20}],"form_id":"addtpc_32_e5aa0f0abca3","length_bits":32,"mnemonic":"ADDTPC","semantic_family":"BRU","semantic_group":"BRU","semantic_handler":"AddToPC","semantic_summary":"ADDTPC - Add a signed 4 KiB page displacement to the current TPC.","status":"accepted"}],"classification":["bru"],"contract":{"block_composition":["none"],"canonical_assembly":["addtpc simm, ->{t, u, Rd}"],"defaults":["The imm20 field is sign-extended and scaled by 4096 bytes; encoded zero contributes a zero page displacement and produces the current instruction TPC.","The selected assembly form determines which fields are present; every present field carries its encoded value and no encoded zero means omission."],"encoding_class":"standalone-encoded","examples":["addtpc simm, ->{t, u, Rd}"],"exceptions":["Reserved field encodings raise Fault_IllegalInstruction before effects; handler-specific arithmetic, memory, control-flow, system-register, and privilege faults follow the embedded normative ASL operation."],"field_contracts":{},"field_zero_meanings":{"RegDst":"Encoded zero names the architectural zero GPR.","imm20":"Encoded zero contributes a zero page displacement and produces the current instruction TPC."},"legality":["addtpc_32_e5aa0f0abca3.RegDst excludes 10; the excluded encoding is reserved."],"memory_effects":["none"],"operands":[{"field":"RegDst","role":"absolute GPR destination"},{"field":"imm20","role":"signed 20-bit 4 KiB page displacement"}],"ordering":["Read the current instruction TPC before computing the wrapping XLEN result.","After the destination effect, the scalar dispatch boundary advances TPC by four bytes."],"standalone_opcode":true,"state_effects":["ADDTPC writes TPC + (SignExtend(imm20) << 12), wrapping at XLEN, through the selected Reg5 destination.","The instruction does not install a control-flow target and does not directly modify TPC."]},"depends_on":["PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"],"id":"PTO-SCALAR-ADDTPC","mnemonic":"ADDTPC","summary":"ADDTPC - Add a signed 4 KiB page displacement to the current TPC.","surface":"scalar"}// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}// NDF-BEGIN: PTO-ADDTPC-PAGE-001// ndf: kind=contract level=L1 layer=scalar status=accepted// ADDTPC MUST add SignExtend(imm20) shifted left by twelve to the current// instruction TPC, MUST wrap at XLEN, and MUST write only through the selected// Reg5 destination. It MUST NOT install a control-flow target or directly// advance TPC. Encoded immediate zero MUST produce the current TPC.// NDF-END: PTO-ADDTPC-PAGE-001// DOC-BEGIN: decodereadonly func InstructionContractOperation_ADDTPC() => ScalarOperationbegin return ScalarOperation_ADDTPC;end;// DOC-END: decode// DOC-BEGIN: operationreadonly func InstructionContractHandler_ADDTPC() => ScalarSemanticHandlerbegin return ScalarHandler_AddToPC;end;
pure func InstructionContractUsesTPC_ADDTPC() => booleanbegin return TRUE;end;
pure func InstructionContractImmediateWidth_ADDTPC() => integer {20}begin return 20;end;
pure func InstructionContractImmediateIsSigned_ADDTPC() => booleanbegin return TRUE;end;
pure func InstructionContractPageShift_ADDTPC() => integer {12}begin return 12;end;
pure func InstructionContractWritesTPC_ADDTPC() => booleanbegin return FALSE;end;
pure func InstructionContractTarget_ADDTPC( base: Word, page_offset: Word) => Wordbegin return base + LSL(page_offset, 12);end;// DOC-END: operation
ADDTPC materializes a page-relative address from the current TPC without performing a control transfer.
The signed 20-bit immediate is extended, shifted left by 12, and added to the snapshotted current TPC modulo 2^PTO_XLEN.
The computed address is published through the encoded destination; it is not installed as the next TPC.
RegDst selects the encoded destination or discard behavior.imm20 supplies the encoded immediate or displacement.The result is published through the encoded destination, then successful dispatch advances TPC by 4 bytes.
The instruction does not branch and does not access memory or reservation state.
Encoding, reserved field values, and source availability are checked before destination, control, or TPC effects.
This example illustrates the current owner and does not create a second semantic definition.
addtpc simm, ->{t, u, Rd} publishes the page-relative address as data and then continues sequentially.
Bodies come from owning ASL. Dragging or buttons change only this page-session view order.
ADDTPC MUST add SignExtend(imm20) shifted left by twelve to the current instruction TPC, MUST wrap at XLEN, and MUST write only through the selected Reg5 destination. It MUST NOT install a control-flow target or directly advance TPC. Encoded immediate zero MUST produce the current TPC.
PTO-ADDTPC-PAGE-001asl/scalar/bru/ADDTPC.asl5540c697d3e55a266f3ebb431848fce1b8a21ba0396a793ca71de8a5ca124d6996eff164ebdb9a0bbdf4d6a8916c330b219aa881018a883e9ada42c958e505dc16 matching entries
PTO-AVS-BRU-ADDTPC-ALIAS-001tests/asl/scalar/bru/ADDTPC/scalar-exec-addtpc-alias-001.asl9322d16f5593cd7ec0edb1925171bcb16d0d19f972de598f5c4009a8dd662e8bPTO-AVS-BRU-ADDTPC-BOUND-001tests/asl/scalar/bru/ADDTPC/scalar-bound-addtpc-fields-001.asld2cb3a4acfa9580b9c6838d23e7ad8145ee87c9301c33c937eef68b47985d430PTO-AVS-BRU-ADDTPC-EXEC-001tests/asl/scalar/bru/ADDTPC/scalar-exec-addtpc-direct-001.asl2551dd00a1126d04c2e81ff5843df395d0d6ae1336a6dba06e0286dec54a8980PTO-AVS-SCALAR-ADDTPC-DECODE-001tests/asl/scalar/bru/ADDTPC/scalar-decode-addtpc-canonical-001.asl15fdbbb39413ed618a8f3522c3e78162b7677efe894258ceb960202ca9ff691dPTO-AVS-SCALAR-ADDTPC-PAGE-001tests/asl/scalar/bru/ADDTPC/scalar-exec-addtpc-page-001.aslf01bbb34c6654a4e112ba2cc9faa142e63bbaeaf487e5bb59d81274d3af14117PTO-AVS-SCALAR-ADDTPC-SIGNED-001tests/asl/scalar/bru/ADDTPC/scalar-bound-addtpc-signed-001.asl539b198a603479817837e9291fb1f3dbd9e19209e3da79745474d500d5769fbePTO-EVIDENCE-RELEASE-TRACEABILITYPTO-EVIDENCE-RELEASE-TRACEABILITYspec/evidence/release-traceability-readiness.jsonc7327021d39dc67ac5564bc55073b3870a397d79ac8d9648284d56e33bc14a3ePTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREPTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREspec/evidence/instruction-contract-closure.json3ef2bb62421c79dff8fa77a1c7983923b523244b8090812883ef81286ca8106aPTO-EVIDENCE-ARCHITECTURE-READINESSPTO-EVIDENCE-ARCHITECTURE-READINESSspec/evidence/architecture-readiness.json4b0b85199101251bea744e0f3591cc31906909dc80d5ab651c417a936036a004PTO-EVIDENCE-RELEASE-GATE-READINESSPTO-EVIDENCE-RELEASE-GATE-READINESSspec/evidence/release-gate-readiness.jsona0f4d2b6920c08981ea55fd8ef820708a40d4feb5402c5150e8e9ab532d84ce0PTO-EVIDENCE-RELEASE-MANIFESTPTO-EVIDENCE-RELEASE-MANIFESTspec/release-manifest.json1a64c109ed7a90351c41e2a418b3c0ebaf8ad975838986d2101385186b85c0d8Loading ADR-0021…
ADR-0021docs/status/decisions/0021-scalar-pc-relative-and-return-address.md99c06f12ee973312181938672a9e059a0dc5a0c4e08effd666616b8006e5f5f9Loading ADR-0027…
ADR-0027docs/status/decisions/0027-scalar-bru-totality-and-target-legality.md9289112d250e31f4222dcd27d20bda791be7a1b57764af7ed9b187e767b7acedLoading ADR-0059…
ADR-0059docs/status/decisions/0059-mnemonic-field-encoding-closure.mdf18d13f735cfaf9f2803c754c5818f4af33d1cc42c489f0d9ce060b07bb3a196Loading ADR-0066…
ADR-0066docs/status/decisions/0066-addtpc-page-scaled-immediate.md6f1c29b7c8a5229b7dfa5e8e087c170361de086751250bba9a95b11300f532fdLoading ADR-0084…
ADR-0084docs/status/decisions/0084-scalar-system-and-queue-operations.mde068992fa81e2c4ac46e492391a2f784141d68e041bf0b9e0586c37217d1e08c{
"classification": [
"bru"
],
"documentation": "docs/scalar/bru/ADDTPC.md",
"id": "PTO-SCALAR-ADDTPC",
"instruction_contract": {
"artifact": "spec/evidence/instruction-contract-closure.json",
"mnemonic": "ADDTPC",
"ndf_clause": "PTO-INST-SCALAR-ADDTPC"
},
"mnemonic": "ADDTPC",
"readiness_subjects": [
"ADR-0021",
"ADR-0027",
"ADR-0059",
"ADR-0066",
"ADR-0084"
],
"semantic_tests": [
"PTO-AVS-BRU-ADDTPC-ALIAS-001",
"PTO-AVS-BRU-ADDTPC-BOUND-001",
"PTO-AVS-BRU-ADDTPC-EXEC-001",
"PTO-AVS-SCALAR-ADDTPC-PAGE-001",
"PTO-AVS-SCALAR-ADDTPC-SIGNED-001"
],
"source": "asl/scalar/bru/ADDTPC.asl",
"surface": "scalar",
"tests": [
"PTO-AVS-BRU-ADDTPC-ALIAS-001",
"PTO-AVS-BRU-ADDTPC-BOUND-001",
"PTO-AVS-BRU-ADDTPC-EXEC-001",
"PTO-AVS-SCALAR-ADDTPC-DECODE-001",
"PTO-AVS-SCALAR-ADDTPC-PAGE-001",
"PTO-AVS-SCALAR-ADDTPC-SIGNED-001"
]
}0.58.5 · Release candidate7dc8b7e5b121d2b2499a2273bebff29e2cd868125540c697d3e55a266f3ebb431848fce1b8a21ba0396a793ca71de8a5ca124d698da970cdf13c98a832f1f858149173e76e9398cad747eb7d6a6bab6194f29123asl/scalar/bru/ADDTPC.aslasl/scalar/bru/ADDTPC.aslasl/scalar/bru/ADDTPC.asl