Operands and parameters
SSR_ID- system-register identifier
SrcL- Reg5 source: R0..R23, T#1..T#4, or U#1..U#4
HL.SSRSET writes the complete encoded system-register address.
PTO-SCALAR-HL-SSRSEThl.ssrset SrcL, SSR_ID| Field | Bits | Signedness | Architectural role | Encoded zero |
|---|---|---|---|---|
SSR_ID | 24 | encoding-defined | system-register identifier | Encoded zero selects value zero of the system-register identifier. |
SrcL | 5 | encoding-defined | Reg5 source: R0..R23, T#1..T#4, or U#1..U#4 | Encoded zero names the architectural zero GPR. |
Loading WaveDrom diagram… The encoding table and WaveJSON remain available below.
| Decoded item | Bit range | Value |
|---|---|---|
| SSR_ID | 47:36 | variable |
| SrcL | 35:31 | variable |
| Constant | 30:16 | 15'b001000000111011 |
| SSR_ID | 15:4 | variable |
| Constant | 3:0 | 4'b1110 |
{
"reg": [
{
"bits": 4,
"name": "4'b1110"
},
{
"bits": 12,
"name": "SSR_ID"
},
{
"bits": 15,
"name": "15'b001000000111011"
},
{
"bits": 5,
"name": "SrcL"
},
{
"bits": 12,
"name": "SSR_ID"
}
],
"config": {
"bits": 48,
"fontsize": 13,
"hspace": 900,
"lanes": 2,
"offset": 0
}
}hl.ssrset SrcL, SSR_ID
SSR_IDSrcLThis Operation comes directly from the instruction owner; the page does not rewrite its behavior.
readonly func InstructionContractOperation_HL_SSRSET() => ScalarOperationbegin return ScalarOperation_HL_SSRSET;end;readonly func InstructionContractHandler_HL_SSRSET() => ScalarSemanticHandlerbegin return ScalarHandler_ExecuteSystemRegisterSet;end;
pure func InstructionContractRequiresSystemBlock_HL_SSRSET() => booleanbegin return TRUE;end;
pure func InstructionContractSystemTransferKind_HL_SSRSET() => bits(2)begin return '01';end;
pure func InstructionContractSystemAddressWidth_HL_SSRSET() => integer {5,12,24}begin return 24;end;
pure func InstructionContractPushesTemporaryT_HL_SSRSET() => booleanbegin return FALSE;end;// PTO-INSTRUCTION: {"assembly":["hl.ssrset SrcL, SSR_ID"],"block":[],"catalog_indices":[284],"catalog_records":[{"asm":"hl.ssrset SrcL, SSR_ID","constraints":[],"encoding":[{"index":0,"mask":"0x00007fff000f","match":"0x0000103b000e","width_bits":48}],"encoding_kind":"HL48","fields":[{"name":"SSR_ID","pieces":[{"instruction_lsb":36,"value_lsb":0,"width":12},{"instruction_lsb":4,"value_lsb":12,"width":12}],"signedness":"encoding-defined","width":24},{"name":"SrcL","pieces":[{"instruction_lsb":31,"value_lsb":0,"width":5}],"signedness":"encoding-defined","width":5}],"form_id":"hl_ssrset_48_dd25753307c2","length_bits":48,"mnemonic":"HL.SSRSET","semantic_family":"SYS","semantic_group":"SYS","semantic_handler":"ExecuteSystemRegisterSet","semantic_summary":"HL.SSRSET writes the complete encoded system-register address.","status":"accepted"}],"classification":["sys"],"contract":{"block_composition":["HL.SSRSET executes as one scalar operation in the body of an active SYS block."],"canonical_assembly":["hl.ssrset SrcL, SSR_ID"],"defaults":["Every displayed operand is encoded explicitly. Encoded zero is an assigned value and never denotes omission."],"encoding_class":"standalone-encoded","examples":["hl.ssrset SrcL, SSR_ID"],"exceptions":["Invalid block placement raises Illegal Block Exception before encoded-field legality or effects.","A reserved encoding or rejected access raises Illegal Instruction before destination, queue, system-state, or TPC effects."],"field_contracts":{},"field_zero_meanings":{"SSR_ID":"Encoded zero selects value zero of the system-register identifier.","SrcL":"Encoded zero names the architectural zero GPR."},"legality":["Every fixed bit and explicit field constraint is checked before operation semantics.","The complete encoded address is checked against its RO, WO, RW, unknown-address, and current-ACR access rules before effects."],"memory_effects":["none"],"operands":[{"field":"SSR_ID","role":"system-register identifier"},{"field":"SrcL","role":"Reg5 source: R0..R23, T#1..T#4, or U#1..U#4"}],"ordering":["Preflight the complete address, current-ACR permission, and writable access class before reading SrcL.","Snapshot SrcL, perform the register write, and then advance TPC."],"standalone_opcode":true,"state_effects":["Write the complete XLEN source to the selected writable system register.","A rejected write preserves the source and target register except for ordinary trap entry."]},"depends_on":["PTO-SCALAR-MODEL-SYS-REGISTERS"],"id":"PTO-SCALAR-HL-SSRSET","mnemonic":"HL.SSRSET","summary":"HL.SSRSET writes the complete encoded system-register address.","surface":"scalar"}// PTO-REVIEW: {"review_method":"formal-definition-read","outcome":"FORMAL-COMPLETE","reviewed_fields":["assembly","encoding","defaults","operation","state","memory","ordering","faults","reserved"]}// NDF-BEGIN: PTO-HL-SSRSET-DECISION-BINDING-001// ndf: kind=contract level=L1 layer=scalar status=accepted// HL.SSRSET MUST implement the mnemonic-local canonical assembly, encoded// legality, defaults, state and memory effects, ordering, and fault boundaries// declared in this owner. The operation region below is the executable binding// for every accepted decision that names this mnemonic.// NDF-END: PTO-HL-SSRSET-DECISION-BINDING-001// DOC-BEGIN: decodereadonly func InstructionContractOperation_HL_SSRSET() => ScalarOperationbegin return ScalarOperation_HL_SSRSET;end;// DOC-END: decode// DOC-BEGIN: operationreadonly func InstructionContractHandler_HL_SSRSET() => ScalarSemanticHandlerbegin return ScalarHandler_ExecuteSystemRegisterSet;end;
pure func InstructionContractRequiresSystemBlock_HL_SSRSET() => booleanbegin return TRUE;end;
pure func InstructionContractSystemTransferKind_HL_SSRSET() => bits(2)begin return '01';end;
pure func InstructionContractSystemAddressWidth_HL_SSRSET() => integer {5,12,24}begin return 24;end;
pure func InstructionContractPushesTemporaryT_HL_SSRSET() => booleanbegin return FALSE;end;// DOC-END: operation
HL.SSRSET writes a complete XLEN value to an assigned writable system register.
The ASL DOC region selects ScalarHandler_ExecuteSystemRegisterSet. Placement and encoded legality are checked before sources or system state can change.
The instruction occupies one scalar operation position in the body of an active SYS block.
SSR_ID carries the system-register identifier; SrcL carries the Reg5 source: R0..R23, T#1..T#4, or U#1..U#4.
Encoded zero is an assigned field value, never an omitted operand.
After writable-access preflight, the complete XLEN source replaces the selected system register and then TPC advances.
A rejected write preserves both the source and target register beyond ordinary trap entry.
Address, current-ACR permission, and writable access class are checked before SrcL is read.
Invalid SYS-block placement is rejected before field checks. Reserved encodings or denied access produce no destination, queue, system-state, or TPC effect beyond the ordinary trap envelope.
This spelling example is illustrative; exact legality and effects remain in the generated contract below.
Start with hl.ssrset SrcL, SSR_ID and trace its encoded fields through preflight before following the selected system effect.
Bodies come from owning ASL. Dragging or buttons change only this page-session view order.
HL.SSRSET MUST implement the mnemonic-local canonical assembly, encoded legality, defaults, state and memory effects, ordering, and fault boundaries declared in this owner. The operation region below is the executable binding for every accepted decision that names this mnemonic.
PTO-HL-SSRSET-DECISION-BINDING-001asl/scalar/sys/HL.SSRSET.asl7d527b6e8f96cfb5c7879713b563d3fd584673ad044ac8ffeb4ed2734c540cf82f8cf927731bf0000091db9d24c03ebcf0fbb3e6402133eb281a4018533cbc7218 matching entries
PTO-AVS-SCALAR-HL-SSRSET-DECODE-001tests/asl/scalar/sys/HL.SSRSET/scalar-decode-hl-ssrset-canonical-001.asl97cd97cc8ad7d2ab18df72cc719ee787da0952b9b1dbbc11a7f7e7c543f5d3bfPTO-AVS-SYS-HL-SSRSET-ACCESS-001tests/asl/scalar/sys/HL.SSRSET/scalar-fault-hl-ssrset-access-001.asl9ad8992a8ad5d94d0ba061abdf14d75dbdc49b92aa3bf30362aa5a08b0af1186PTO-AVS-SYS-HL-SSRSET-EXEC-001tests/asl/scalar/sys/HL.SSRSET/scalar-exec-hl-ssrset-direct-001.asl34f9caf1fc3573ef2f8dd408aaef064332f7e3a9e41d51e3caf1a7fca6f85e3fPTO-AVS-SYS-HL-SSRSET-PLACE-001tests/asl/scalar/sys/HL.SSRSET/scalar-fault-hl-ssrset-place-001.aslf7b5abf663eef30dd53eec5c954e7bda5c96e1c6a3e6618a2277bc0d785bbcebPTO-AVS-SYS-HL-SSRSET-RING-001tests/asl/scalar/sys/HL.SSRSET/scalar-fault-hl-ssrset-ring-001.asl571da418df9c2e2957ae14ab245b81761418a51736c5d973606bfc0b82410a15PTO-AVS-SYS-HL-SSRSET-TSRC-001tests/asl/scalar/sys/HL.SSRSET/scalar-exec-hl-ssrset-tsrc-001.asl1c442b80d47b1bd6a1831a2df0cead33f8deceda5a474281bfc02488c1a38f28PTO-AVS-SYS-HL-SSRSET-UNKNOWN-001tests/asl/scalar/sys/HL.SSRSET/scalar-fault-hl-ssrset-unknown-001.asle1de68a7166456663564a9f07bde7992c0374349fadb6e0c24c9546c8419e7bePTO-AVS-SYS-HL-SSRSET-USRC-001tests/asl/scalar/sys/HL.SSRSET/scalar-exec-hl-ssrset-usrc-001.asl5225025d01c1c4244fdd3b86fbadf964073f8eb934b57d2d8a7d4f95a5edfb4dPTO-EVIDENCE-RELEASE-TRACEABILITYPTO-EVIDENCE-RELEASE-TRACEABILITYspec/evidence/release-traceability-readiness.jsonc7327021d39dc67ac5564bc55073b3870a397d79ac8d9648284d56e33bc14a3ePTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREPTO-EVIDENCE-INSTRUCTION-CONTRACT-CLOSUREspec/evidence/instruction-contract-closure.json3ef2bb62421c79dff8fa77a1c7983923b523244b8090812883ef81286ca8106aPTO-EVIDENCE-ARCHITECTURE-READINESSPTO-EVIDENCE-ARCHITECTURE-READINESSspec/evidence/architecture-readiness.json4b0b85199101251bea744e0f3591cc31906909dc80d5ab651c417a936036a004PTO-EVIDENCE-RELEASE-GATE-READINESSPTO-EVIDENCE-RELEASE-GATE-READINESSspec/evidence/release-gate-readiness.jsona0f4d2b6920c08981ea55fd8ef820708a40d4feb5402c5150e8e9ab532d84ce0PTO-EVIDENCE-RELEASE-MANIFESTPTO-EVIDENCE-RELEASE-MANIFESTspec/release-manifest.json1a64c109ed7a90351c41e2a418b3c0ebaf8ad975838986d2101385186b85c0d8Loading ADR-0003…
ADR-0003docs/status/decisions/0003-pto-owned-system-register-names.mdc6a5379776c3b29c25f0896bc56f84d8f5c15832bbba0859b822aa99a65e342dLoading ADR-0018…
ADR-0018docs/status/decisions/0018-pto-v0-trap-disposition.mdce33454ffd2a595425ebece5954c9990ea2b9c4890008ad700599f767d7b9716Loading ADR-0031…
ADR-0031docs/status/decisions/0031-scalar-sys-totality-and-profile-boundaries.md5680b3516be6c28a1ccb198c99f5efb66317c65330f6d87434173024d2795a7dLoading ADR-0059…
ADR-0059docs/status/decisions/0059-mnemonic-field-encoding-closure.mdf18d13f735cfaf9f2803c754c5818f4af33d1cc42c489f0d9ce060b07bb3a196Loading ADR-0084…
ADR-0084docs/status/decisions/0084-scalar-system-and-queue-operations.mde068992fa81e2c4ac46e492391a2f784141d68e041bf0b9e0586c37217d1e08c{
"classification": [
"sys"
],
"documentation": "docs/scalar/sys/HL.SSRSET.md",
"id": "PTO-SCALAR-HL-SSRSET",
"instruction_contract": {
"artifact": "spec/evidence/instruction-contract-closure.json",
"mnemonic": "HL.SSRSET",
"ndf_clause": "PTO-INST-SCALAR-HL-SSRSET"
},
"mnemonic": "HL.SSRSET",
"readiness_subjects": [
"ADR-0003",
"ADR-0018",
"ADR-0031",
"ADR-0059",
"ADR-0084"
],
"semantic_tests": [
"PTO-AVS-SYS-HL-SSRSET-ACCESS-001",
"PTO-AVS-SYS-HL-SSRSET-EXEC-001",
"PTO-AVS-SYS-HL-SSRSET-PLACE-001",
"PTO-AVS-SYS-HL-SSRSET-RING-001",
"PTO-AVS-SYS-HL-SSRSET-TSRC-001",
"PTO-AVS-SYS-HL-SSRSET-UNKNOWN-001",
"PTO-AVS-SYS-HL-SSRSET-USRC-001"
],
"source": "asl/scalar/sys/HL.SSRSET.asl",
"surface": "scalar",
"tests": [
"PTO-AVS-SCALAR-HL-SSRSET-DECODE-001",
"PTO-AVS-SYS-HL-SSRSET-ACCESS-001",
"PTO-AVS-SYS-HL-SSRSET-EXEC-001",
"PTO-AVS-SYS-HL-SSRSET-PLACE-001",
"PTO-AVS-SYS-HL-SSRSET-RING-001",
"PTO-AVS-SYS-HL-SSRSET-TSRC-001",
"PTO-AVS-SYS-HL-SSRSET-UNKNOWN-001",
"PTO-AVS-SYS-HL-SSRSET-USRC-001"
]
}0.58.5 · Release candidate7dc8b7e5b121d2b2499a2273bebff29e2cd868127d527b6e8f96cfb5c7879713b563d3fd584673ad044ac8ffeb4ed2734c540cf8a0b0e0cd776a9ba8fd468f7077ea59075599d00a08db04b31795d96932f96d0easl/scalar/sys/HL.SSRSET.aslasl/scalar/sys/HL.SSRSET.aslasl/scalar/sys/HL.SSRSET.asl