ADR 0075: Block attributes and lifecycle

Context

ADR 0062 recorded a single repository-wide mnemonic audit. This record preserves the accepted decisions for this family as one decision-scoped owner. The former identifiers remain only in legacy_ids and the generated ADR index; current normative meaning is owned by the affected ASL/NDF clauses.

Decisions

Decision 001: B.CATR.DR selects dimension-reduction mode

B.CATR.DR is the dimension-reduction-mode selector. It does not select dynamic rounding and does not select direct-register addressing.

An encoded DR=0 selects the default multidimensional mode. An encoded DR=1 selects dimension-reduction mode for block operations that define that mode.

Decision 002: B.CATR.trap requests a post-commit trap

An encoded trap=1 requests a synchronous post-commit trap. The current block MUST first commit successfully and atomically. After that commit and before the selected continuation executes, the processor MUST enter the architectural trap/context path.

The saved trap context MUST retain the selected continuation, and trap return MUST resume that continuation. A failed or rejected block commit MUST NOT generate this post-commit trap.

Decision 003: B.CATR.far selects remote block execution

An encoded far=0 selects the default behavior: the current block executes on the initiating core.

An encoded far=1 marks the current block for remote execution. The remote destination is selected by the existing routing state; B.CATR does not encode a destination. The block inputs MUST be sent to the selected remote execution target. After remote execution completes, its results MUST be returned to the initiating core, and the block MUST commit on that initiating core.

Decision 004: B.CATR.atomic makes the block one transaction

An encoded atomic=0 selects normal block execution. An encoded atomic=1 makes the entire block one non-interleavable, all-or-nothing architectural transaction.

The block's memory effects and register-output effects MUST become visible together or MUST all remain ineffective. An interrupt, exception, or other fault before successful completion MUST NOT expose a partial result.

Decision 005: B.CATR may appear at most once per block

A block MAY omit B.CATR, in which case every control attribute has its default zero value. A block MUST NOT contain more than one B.CATR.

Encountering a second B.CATR in the same block MUST raise Illegal Block Exception before the second instruction changes architectural or pending block state. Attribute bits from multiple B.CATR instructions MUST NOT be merged, and a later instruction MUST NOT overwrite an earlier one.

Decision 006: B.CATR.DR is limited to group-executed tile engines

An encoded DR=1 is legal only for a block whose selected execution engine is VEC, SFU, or TLSU.

An encoded DR=1 in a CUBE block or a non-tile block MUST raise Illegal Block Exception before architectural or pending block effects. An encoded DR=0 selects the default multidimensional mode and introduces no additional engine restriction.

Decision 007: omitted and encoded B.DATR.PadValueOrByteId are distinct

When an operation consumes PadValueOrByteId as a padding-value selector, an omitted B.DATR contribution selects Null. Omission MUST NOT be represented by clearing the encoded field.

An explicitly encoded field has the following complete mapping:

Code	Padding value
00	Zero
01	Max
10	Min
11	Null

Operation-specific schemas MAY consume the same two encoded bits for another defined role, such as a byte selector. An operation that consumes neither role MUST require the field to be zero.

Decision 008: B.DATR.CMode defines six comparison predicates

B.DATR.CMode is a comparison-mode selector. It is not a conversion-mode selector. Its three-bit allocation is:

Code	Predicate
000	EQ
001	NE
010	LT
011	GT
100	LE
101	GE
110	reserved for future extension
111	reserved for future extension

Reserved values MUST raise an illegal-instruction fault before effects.

Decision 009: B.DATR.Layout has thirteen assigned transformations

The five-bit Layout field has exactly the following assigned values:

Code	Layout
0	NORM
1	ND2DN
3	ND2ZN
4	ND2NZ
6	DN2ND
8	DN2ZN
9	DN2NZ
17	ZN2ND
18	ZN2DN
20	ZN2NZ
27	NZ2ND
28	NZ2DN
30	NZ2ZN

Every other five-bit value is reserved for future extension and MUST reject before effects. Each assigned transformation requires an executable layout mapping; an implementation-defined placeholder is not sufficient.

Decision 010: omitted B.DATR.DataType inherits the block input type

When an operation-specific schema permits the B.DATR.DataType contribution to be omitted, it inherits the data type selected by the block start. Omission MUST be tracked independently from the encoded value.

An explicitly encoded zero selects FP64; it does not mean inherit. Other assigned codes select their architecture data types. Reserved codes MUST reject before effects. Every Tile mnemonic MUST explicitly define the defaults and supported type subset for each optional field it consumes.

Decision 011: Canonicalize converts CUBE-private output through TCVT

B.DATR.Canonicalize is an assigned field. Canonicalize=1 is consumed only by TCVT when converting a CUBE-private output representation into the standard left-matrix Tile representation, including any data-type-dependent fractal merge or split required by that conversion.

Canonicalize=0 disables that conversion. Any other operation carrying a nonzero Canonicalize field MUST reject before effects.

Decision 012: B.DATR may appear at most once per block

A block MAY omit B.DATR and use the operation-specific defaults defined for every data attribute. A block MUST NOT contain more than one B.DATR.

Encountering a second B.DATR in the same block MUST raise Illegal Block Exception before the second instruction changes architectural or pending block state. Multiple B.DATR instructions MUST NOT be merged, and a later instruction MUST NOT overwrite an earlier one.

Decision 013: B.DIM.RegSrc names only an absolute GPR

B.DIM.RegSrc codes 0..23 name the twenty-four absolute GPRs, including the architectural zero register at code zero. Codes 24..31 are reserved in B.DIM; they MUST NOT read either temporary queue and MUST reject as an illegal instruction before effects.

Decision 014: B.DIM writes the low sixteen bits of base plus immediate

B.DIM reads the selected absolute GPR, zero-extends the encoded unsigned seventeen-bit immediate, and performs the addition at PTO_XLEN width. It writes the low sixteen bits of that sum, zero-extended to the LB storage width, to the LB selected by the instruction form.

Encoded RegSrc=0 supplies a zero base and encoded uimm17=0 supplies a zero immediate. Neither encoded zero denotes omission.

Decision 015: each LB may be written at most once per block

Within one block, the combined B.DIM and compressed dimension-setting forms MUST write each of LB0, LB1, and LB2 at most once.

An attempt to write an LB that has already been written in the current block MUST raise Illegal Block Exception before changing the LB or any other pending or architectural block state. A later write MUST NOT overwrite or merge with the earlier value.

Decision 016: B.HINT may appear at most once per block header

An ordinary block header MAY contain at most one B.HINT, regardless of the encoded hint form. Encountering a second B.HINT in the same block header MUST raise Illegal Block Exception before the second instruction changes pending or architectural state. Multiple hints MUST NOT be merged, and a later hint MUST NOT overwrite an earlier hint.

Decision 017: B.HINT.TRACE opens an empty block without auto-termination

The TRACE form is a special block-start operation. Its B/E field selects the trace boundary: zero begins a traced region and one ends it. Executing the form opens an empty block and records the selected boundary.

The TRACE form MUST NOT complete or commit the empty block by itself. The block MUST subsequently be terminated by BSTOP or by the next BSTART, following the normal block lifecycle and commit rules.