MULW

assembly

[
  "mulw SrcL, SrcR, ->{t, u, Rd}"
]

block

[]

catalog_indices

[
  365
]

catalog_records

[
  {
    "asm": "mulw SrcL, SrcR, ->{t, u, Rd}",
    "constraints": [],
    "encoding": [
      {
        "index": 0,
        "mask": "0xfe00707f",
        "match": "0x00002047",
        "width_bits": 32
      }
    ],
    "encoding_kind": "L32",
    "fields": [
      {
        "name": "RegDst",
        "pieces": [
          {
            "instruction_lsb": 7,
            "value_lsb": 0,
            "width": 5
          }
        ],
        "signedness": "encoding-defined",
        "width": 5
      },
      {
        "name": "SrcL",
        "pieces": [
          {
            "instruction_lsb": 15,
            "value_lsb": 0,
            "width": 5
          }
        ],
        "signedness": "encoding-defined",
        "width": 5
      },
      {
        "name": "SrcR",
        "pieces": [
          {
            "instruction_lsb": 20,
            "value_lsb": 0,
            "width": 5
          }
        ],
        "signedness": "encoding-defined",
        "width": 5
      }
    ],
    "form_id": "mulw_32_b90cb6a30a23",
    "length_bits": 32,
    "mnemonic": "MULW",
    "semantic_family": "ALU",
    "semantic_group": "ALU",
    "semantic_handler": "ScalarMultiplyW",
    "semantic_summary": "MULW multiplies the source low 32-bit values, retains the low 32 product bits, sign-extends them to XLEN, and publishes the result.",
    "status": "accepted"
  }
]

classification

[
  "alu"
]

contract

{
  "block_composition": [
    "none"
  ],
  "canonical_assembly": [
    "mulw SrcL, SrcR, ->{t, u, Rd}"
  ],
  "defaults": [
    "Every encoded operand and destination field is required; no field can be omitted.",
    "The mnemonic fixes signedness, effective operand width, single-versus-pair result shape, and add-versus-subtract behavior; there is no encoded arithmetic mode."
  ],
  "encoding_class": "standalone-encoded",
  "examples": [
    "mulw srcl, srcr, ->{t, u, rd}"
  ],
  "exceptions": [
    "Multiplication and accumulation are fixed-width and raise no arithmetic exception; discarded overflow wraps modulo the defined result width.",
    "An unavailable selected T/U source raises Fault_IllegalInstruction before any destination effect and before TPC advances."
  ],
  "field_contracts": {},
  "field_zero_meanings": {
    "SrcL": "Encoded zero reads the architectural zero GPR.",
    "SrcR": "Encoded zero reads the architectural zero GPR.",
    "RegDst": "Encoded zero discards the result."
  },
  "legality": [
    "Every source Reg5 code is assigned: 0..23 select absolute GPRs, 24..27 select T#1..T#4, and 28..31 select U#1..U#4 without consumption.",
    "Each destination independently uses the common map: codes 0 and 24..29 discard, codes 1..23 write GPRs, code 30 pushes U, and code 31 pushes T.",
    "Fixed encoding bits must match the canonical form; every encoded source, destination, and immediate value otherwise has assigned behavior."
  ],
  "memory_effects": [
    "none"
  ],
  "operands": [
    {
      "field": "RegDst",
      "role": "Reg5 destination or discard"
    },
    {
      "field": "SrcL",
      "role": "left multiplicand or additive Reg5 source"
    },
    {
      "field": "SrcR",
      "role": "right multiplicand Reg5 source"
    }
  ],
  "ordering": [
    "Snapshot every source before any destination effect so duplicate selectors and destination aliases observe pre-instruction values.",
    "Publish the result, then advance TPC by four bytes."
  ],
  "standalone_opcode": true,
  "state_effects": [
    "Multiply the source low 32-bit patterns modulo 2^32, then sign-extend result bit 31 through XLEN.",
    "Snapshot every source before the destination effect, publish the XLEN result through the common Reg5 destination map, and do not consume relative sources.",
    "No memory, reservation, descriptor, numeric-status, block, privilege, branch-target, or other control state changes. Successful execution advances TPC by four bytes."
  ]
}

depends_on

[
  "PTO-BLOCK-MODEL-SCHEMA-PROFILE-ENCODING"
]

id

PTO-SCALAR-MULW

mnemonic

MULW

summary

MULW multiplies the source low 32-bit values, retains the low 32 product bits, sign-extends them to XLEN, and publishes the result.

surface

scalar

{
  "classification": [
    "alu"
  ],
  "documentation": "docs/scalar/alu/MULW.md",
  "id": "PTO-SCALAR-MULW",
  "instruction_contract": {
    "artifact": "spec/evidence/instruction-contract-closure.json",
    "mnemonic": "MULW",
    "ndf_clause": "PTO-INST-SCALAR-MULW"
  },
  "mnemonic": "MULW",
  "readiness_subjects": [
    "ADR-0026",
    "ADR-0059"
  ],
  "semantic_tests": [
    "PTO-AVS-SCALAR-MULW-PRODUCT-001"
  ],
  "source": "asl/scalar/alu/MULW.asl",
  "surface": "scalar",
  "tests": [
    "PTO-AVS-SCALAR-MULW-DECODE-001",
    "PTO-AVS-SCALAR-MULW-PRODUCT-001"
  ]
}