pto.tand

pto.tand is part of the Elementwise Tile Tile instruction set.

Summary

Elementwise bitwise AND of two tiles.

Mechanism

Elementwise bitwise AND of two tiles.

For each element (i, j) in the valid region:

\[ \mathrm{dst}_{i,j} = \mathrm{src0}_{i,j} \;\&\; \mathrm{src1}_{i,j} \]

Syntax

Textual spelling is defined by the PTO ISA syntax-and-operands pages.

Synchronous form:

%dst = tand %src0, %src1 : !pto.tile<...>

AS Level 1 (SSA)

%dst = pto.tand %src0, %src1 : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>

AS Level 2 (DPS)

pto.tand ins(%src0, %src1 : !pto.tile_buf<...>, !pto.tile_buf<...>) outs(%dst : !pto.tile_buf<...>)

C++ Intrinsic

Declared in include/pto/common/pto_instr.hpp:

template <typename TileData, typename... WaitEvents>
PTO_INST RecordEvent TAND(TileData &dst, TileData &src0, TileData &src1, WaitEvents &... events);

Inputs

Operand Role Description
%src0 Left tile First source tile; read at (i, j) for each (i, j) in dst valid region
%src1 Right tile Second source tile; read at (i, j) for each (i, j) in dst valid region
WaitEvents... Optional synchronisation RecordEvent tokens to wait on before issuing the operation

Expected Outputs

Result Type Description
%dst !pto.tile<...> Destination tile; all (i, j) in its valid region contain src0[i,j] & src1[i,j] after the operation

Side Effects

No architectural side effects beyond producing the destination tile. Does not implicitly fence unrelated traffic.

Constraints

Constraints

  • Valid region:
    • The op uses dst.GetValidRow() / dst.GetValidCol() as the iteration domain.

Exceptions

Exceptions

  • Illegal operand tuples, unsupported types, invalid layout combinations, or unsupported target-profile modes are rejected by the verifier or by the selected backend instruction set.
  • Programs must not rely on behavior outside the documented legal domain of this operation, even if one backend currently accepts it.

Performance

A2/A3 Throughput

TAND compiles to CCE vector instructions via the TBinOp.hpp performance model. The throughput is identical to TADD (binary arithmetic):

Metric Value (FP) Value (INT)
Startup latency 14 14
Completion latency 19 17
Per-repeat throughput 2 2
Pipeline interval 18 18

Target-Profile Restrictions

Target-Profile Restrictions

  • Implementation checks (A2A3):

    • Supported element types are 1-byte or 2-byte integral types.
    • dst, src0, and src1 must use the same element type.
    • dst, src0, and src1 must be row-major.
    • Runtime: src0.GetValidRow()/GetValidCol() and src1.GetValidRow()/GetValidCol() must match dst.

  • Implementation checks (A5):

    • Supported element types are 1-byte, 2-byte, or 4-byte integral types.
    • dst, src0, and src1 must use the same element type.
    • dst, src0, and src1 must be row-major.
    • Runtime: src0.GetValidRow()/GetValidCol() and src1.GetValidRow()/GetValidCol() must match dst.

Examples

#include <pto/pto-inst.hpp>

using namespace pto;

void example() {
  using TileT = Tile<TileType::Vec, int32_t, 16, 16>;
  TileT a, b, out;
  TAND(out, a, b);
}

Auto Mode

# Auto mode: compiler/runtime-managed placement and scheduling.
%dst = pto.tand %src0, %src1 : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>

Manual Mode

# Manual mode: bind resources explicitly before issuing the instruction.
# Optional for tile operands:
# pto.tassign %arg0, @tile(0x1000)
# pto.tassign %arg1, @tile(0x2000)
%dst = pto.tand %src0, %src1 : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>

PTO Assembly Form

%dst = tand %src0, %src1 : !pto.tile<...>
# AS Level 2 (DPS)
pto.tand ins(%src0, %src1 : !pto.tile_buf<...>, !pto.tile_buf<...>) outs(%dst : !pto.tile_buf<...>)