pto.vmaxs

pto.vmaxs is part of the Vector-Scalar Instructions instruction set.

Summary

Lane-wise maximum of a vector register and a broadcast scalar.

Mechanism

For each active lane i, dst[i] = max(src[i], scalar). The scalar is broadcast to every active lane. Inactive lanes do not participate in the comparison.

Syntax

PTO Assembly Form

vmaxs %dst, %src, %scalar, %mask : !pto.vreg<NxT>, T

AS Level 1 (SSA)

%result = pto.vmaxs %input, %scalar, %mask : !pto.vreg<NxT>, T, !pto.mask<G> -> !pto.vreg<NxT>

Inputs

Operand Type Description
%input !pto.vreg<NxT> Source vector register
%scalar T Scalar operand compared against each active lane
%mask !pto.mask<G> Predicate mask; only lanes with mask bit 1 participate

Expected Outputs

Result Type Description
%result !pto.vreg<NxT> Lane-wise maximum on the active lanes

Side Effects

This operation has no architectural side effect beyond producing its destination values. It does not implicitly reserve buffers, signal events, or establish memory fences.

Constraints

Constraints

  • %input and %result MUST have the same vector width N and element type T.
  • The mask width MUST match N.
  • The comparison semantics follow the signed/integer or floating-point rules of T.

Exceptions

Exceptions

  • The verifier rejects illegal operand shapes, unsupported element types, and attribute combinations that are not valid for the selected instruction set or target profile.
  • Any additional illegality stated in the constraints section is also part of the contract.

Target-Profile Restrictions

Target-Profile Restrictions
  • Numeric element types are expected; exact target coverage is profile-specific.
  • A5 is the most detailed concrete profile in the current manual; CPU simulation and A2/A3-class targets may support narrower subsets or emulate the behavior while preserving the visible PTO contract.

Examples

for (int i = 0; i < N; i++)
    if (mask[i])
        dst[i] = (src[i] > scalar) ? src[i] : scalar;
%result = pto.vmaxs %values, %threshold, %mask : !pto.vreg<64xf32>, f32, !pto.mask<b32> -> !pto.vreg<64xf32>